7ef295ea5b
Some CPUs are of an opposite data-endianness to other components in the system. Sometimes elfs have the data sections layed out with this CPU data-endianness accounting for when loaded via the CPU, so byte swaps (relative to other system components) will occur. The leading example, is ARM's BE32 mode, which is is basically LE with address manipulation on half-word and byte accesses to access the hw/byte reversed address. This means that word data is invariant across LE and BE32. This also means that instructions are still LE. The expectation is that the elf will be loaded via the CPU in this endianness scheme, which means the data in the elf is reversed at compile time. As QEMU loads via the system memory directly, rather than the CPU, we need a mechanism to reverse elf data endianness to implement this possibility. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
127 lines
4.2 KiB
C
127 lines
4.2 KiB
C
/*
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* TriCore Baseboard System emulation.
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*
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* Copyright (c) 2013-2014 Bastian Koppelmann C-Lab/University Paderborn
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/devices.h"
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#include "net/net.h"
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "sysemu/block-backend.h"
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#include "exec/address-spaces.h"
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#include "hw/block/flash.h"
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#include "elf.h"
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#include "hw/tricore/tricore.h"
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#include "qemu/error-report.h"
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/* Board init. */
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static struct tricore_boot_info tricoretb_binfo;
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static void tricore_load_kernel(CPUTriCoreState *env)
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{
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uint64_t entry;
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long kernel_size;
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kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL,
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NULL, (uint64_t *)&entry, NULL,
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NULL, 0,
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EM_TRICORE, 1, 0);
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if (kernel_size <= 0) {
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error_report("qemu: no kernel file '%s'",
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tricoretb_binfo.kernel_filename);
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exit(1);
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}
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env->PC = entry;
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}
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static void tricore_testboard_init(MachineState *machine, int board_id)
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{
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TriCoreCPU *cpu;
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CPUTriCoreState *env;
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *ext_cram = g_new(MemoryRegion, 1);
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MemoryRegion *ext_dram = g_new(MemoryRegion, 1);
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MemoryRegion *int_cram = g_new(MemoryRegion, 1);
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MemoryRegion *int_dram = g_new(MemoryRegion, 1);
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MemoryRegion *pcp_data = g_new(MemoryRegion, 1);
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MemoryRegion *pcp_text = g_new(MemoryRegion, 1);
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if (!machine->cpu_model) {
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machine->cpu_model = "tc1796";
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}
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cpu = cpu_tricore_init(machine->cpu_model);
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if (!cpu) {
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error_report("Unable to find CPU definition");
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exit(1);
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}
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env = &cpu->env;
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memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024,
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&error_fatal);
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vmstate_register_ram_global(ext_cram);
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memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024,
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&error_fatal);
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vmstate_register_ram_global(ext_dram);
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memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024,
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&error_fatal);
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vmstate_register_ram_global(int_cram);
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memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024,
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&error_fatal);
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vmstate_register_ram_global(int_dram);
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memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024,
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&error_fatal);
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vmstate_register_ram_global(pcp_data);
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memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024,
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&error_fatal);
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vmstate_register_ram_global(pcp_text);
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memory_region_add_subregion(sysmem, 0x80000000, ext_cram);
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memory_region_add_subregion(sysmem, 0xa1000000, ext_dram);
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memory_region_add_subregion(sysmem, 0xd4000000, int_cram);
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memory_region_add_subregion(sysmem, 0xd0000000, int_dram);
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memory_region_add_subregion(sysmem, 0xf0050000, pcp_data);
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memory_region_add_subregion(sysmem, 0xf0060000, pcp_text);
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tricoretb_binfo.ram_size = machine->ram_size;
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tricoretb_binfo.kernel_filename = machine->kernel_filename;
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if (machine->kernel_filename) {
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tricore_load_kernel(env);
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}
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}
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static void tricoreboard_init(MachineState *machine)
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{
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tricore_testboard_init(machine, 0x183);
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}
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static void ttb_machine_init(MachineClass *mc)
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{
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mc->desc = "a minimal TriCore board";
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mc->init = tricoreboard_init;
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mc->is_default = 0;
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}
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DEFINE_MACHINE("tricore_testboard", ttb_machine_init)
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