6ab1790226
When we generate code for guest loads and stores, at the moment they end up being requests for a host-endian access. So for target-system-nios2 (little endian) a load like ldw r3,0(r4) results on an x86 host in the TCG IR qemu_ld_a32_i32 r3,loc2,al+leul,0 but on s390 it is qemu_ld_a32_i32 r3,loc2,al+beul,0 The result is that guests don't work on big-endian hosts. Use the MO_TE* memops rather than the plain ones. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1693 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230623172556.1951974-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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alpha | ||
arm | ||
avr | ||
cris | ||
hexagon | ||
hppa | ||
i386 | ||
loongarch | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
openrisc | ||
ppc | ||
riscv | ||
rx | ||
s390x | ||
sh4 | ||
sparc | ||
tricore | ||
xtensa | ||
Kconfig | ||
meson.build |