Paolo Bonzini 57f6bba023 target/i386: implement VLDMXCSR/VSTMXCSR ...

These are exactly the same as the non-VEX version, but one has to be careful
that only VEX.L=0 is allowed.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2022-10-18 13:58:05 +02:00

..

sysemu

target/i386: Use probe_access_full for final stage2 translation

2022-10-18 13:58:04 +02:00

user

target/i386: Raise #GP on unaligned m128 accesses when required.

2022-09-18 09:17:40 +02:00

bpt_helper.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

cc_helper_template.h

…

cc_helper.c

…

decode-new.c.inc

target/i386: implement VLDMXCSR/VSTMXCSR

2022-10-18 13:58:05 +02:00

decode-new.h

target/i386: reimplement 0x0f 0x38, add AVX

2022-10-18 13:58:05 +02:00

emit.c.inc

target/i386: implement VLDMXCSR/VSTMXCSR

2022-10-18 13:58:05 +02:00

excp_helper.c

target/i386: Raise #GP on unaligned m128 accesses when required.

2022-09-18 09:17:40 +02:00

fpu_helper.c

target/i386: implement XSAVE and XRSTOR of AVX registers

2022-10-18 13:58:05 +02:00

helper-tcg.h

target/i386: Raise #GP on unaligned m128 accesses when required.

2022-09-18 09:17:40 +02:00

int_helper.c

exec/exec-all: Move 'qemu/log.h' include in units requiring it

2022-02-21 10:18:06 +01:00

mem_helper.c

exec/memop: Adding signedness to quad definitions

2022-01-08 15:46:10 +10:00

meson.build

…

misc_helper.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

mpx_helper.c

…

seg_helper.c

target/i386: Truncate values for lcall_real to i32

2022-10-11 09:36:01 +02:00

seg_helper.h

…

tcg-cpu.c

target/i386: Enable TARGET_TB_PCREL

2022-10-11 09:36:01 +02:00

tcg-cpu.h

target/i386: Move X86XSaveArea into TCG

2021-07-06 08:33:51 +02:00

tcg-stub.c

…

translate.c

target/i386: reimplement 0x0f 0x28-0x2f, add AVX

2022-10-18 13:58:05 +02:00