57d874c4c7
The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve the SGX information from VM side when SGX is enabled on Intel platform. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210910102258.46648-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
105 lines
2.8 KiB
C
105 lines
2.8 KiB
C
/*
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* SGX common code
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*
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* Copyright (C) 2021 Intel Corporation
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*
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* Authors:
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* Yang Zhong<yang.zhong@intel.com>
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* Sean Christopherson <sean.j.christopherson@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/i386/pc.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/mem/memory-device.h"
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#include "monitor/qdev.h"
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#include "qapi/error.h"
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#include "exec/address-spaces.h"
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#include "hw/i386/sgx.h"
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SGXInfo *sgx_get_info(Error **errp)
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{
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SGXInfo *info = NULL;
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X86MachineState *x86ms;
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PCMachineState *pcms =
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(PCMachineState *)object_dynamic_cast(qdev_get_machine(),
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TYPE_PC_MACHINE);
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if (!pcms) {
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error_setg(errp, "SGX is only supported on PC machines");
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return NULL;
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}
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x86ms = X86_MACHINE(pcms);
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if (!x86ms->sgx_epc_list) {
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error_setg(errp, "No EPC regions defined, SGX not available");
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return NULL;
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}
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SGXEPCState *sgx_epc = &pcms->sgx_epc;
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info = g_new0(SGXInfo, 1);
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info->sgx = true;
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info->sgx1 = true;
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info->sgx2 = true;
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info->flc = true;
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info->section_size = sgx_epc->size;
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return info;
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}
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int sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size)
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{
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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SGXEPCDevice *epc;
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if (pcms->sgx_epc.size == 0 || pcms->sgx_epc.nr_sections <= section_nr) {
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return 1;
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}
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epc = pcms->sgx_epc.sections[section_nr];
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*addr = epc->addr;
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*size = memory_device_get_region_size(MEMORY_DEVICE(epc), &error_fatal);
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return 0;
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}
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void pc_machine_init_sgx_epc(PCMachineState *pcms)
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{
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SGXEPCState *sgx_epc = &pcms->sgx_epc;
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X86MachineState *x86ms = X86_MACHINE(pcms);
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SgxEPCList *list = NULL;
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Object *obj;
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memset(sgx_epc, 0, sizeof(SGXEPCState));
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if (!x86ms->sgx_epc_list) {
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return;
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}
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sgx_epc->base = 0x100000000ULL + x86ms->above_4g_mem_size;
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memory_region_init(&sgx_epc->mr, OBJECT(pcms), "sgx-epc", UINT64_MAX);
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memory_region_add_subregion(get_system_memory(), sgx_epc->base,
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&sgx_epc->mr);
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for (list = x86ms->sgx_epc_list; list; list = list->next) {
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obj = object_new("sgx-epc");
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/* set the memdev link with memory backend */
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object_property_parse(obj, SGX_EPC_MEMDEV_PROP, list->value->memdev,
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&error_fatal);
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object_property_set_bool(obj, "realized", true, &error_fatal);
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object_unref(obj);
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}
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if ((sgx_epc->base + sgx_epc->size) < sgx_epc->base) {
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error_report("Size of all 'sgx-epc' =0x%"PRIu64" causes EPC to wrap",
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sgx_epc->size);
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exit(EXIT_FAILURE);
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}
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memory_region_set_size(&sgx_epc->mr, sgx_epc->size);
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}
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