qemu/tests/tcg/xtensa
Max Filippov f68774ccd8 tests/tcg/xtensa: only generate defined exception handlers
Don't generate handlers for IRQ levels that are not defined for the CPU
or for window overflow/underflow exceptions for configs w/o windowed
registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-17 11:09:04 -07:00
..
crt.S
linker.ld.S tests/tcg/xtensa: move exception handlers to separate section 2018-09-17 11:09:04 -07:00
macros.inc
Makefile tests/tcg/xtensa: add test for failed memory transactions 2018-09-17 11:09:04 -07:00
test_b.S
test_bi.S
test_boolean.S
test_break.S
test_bz.S
test_cache.S
test_clamps.S
test_extui.S
test_fail.S
test_interrupt.S target/xtensa: tests: clean up interrupt tests 2017-01-15 13:36:09 -08:00
test_loop.S
test_mac16.S
test_max.S
test_min.S
test_mmu.S
test_mul16.S
test_mul32.S
test_nsa.S
test_phys_mem.S tests/tcg/xtensa: add test for failed memory transactions 2018-09-17 11:09:04 -07:00
test_pipeline.S
test_quo.S
test_rem.S
test_rst0.S
test_s32c1i.S
test_sar.S
test_sext.S
test_shift.S
test_sr.S target/xtensa: tests: fix memctl SR test 2018-01-09 09:55:38 -08:00
test_timer.S target/xtensa: tests: add ccount write tests 2017-01-15 13:01:56 -08:00
test_windowed.S
vectors.S tests/tcg/xtensa: only generate defined exception handlers 2018-09-17 11:09:04 -07:00