James Hogan 574da58e46 target/mips: Add EVA support to P5600 ... Add the Enhanced Virtual Addressing (EVA) feature to the P5600 core configuration, along with the related Segmentation Control (SC) feature and writable CP0_EBase.WG bit. This allows it to run Malta EVA kernels. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>		2017-07-21 03:23:36 +01:00
..
cpu-qom.h
cpu.c	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
cpu.h	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
dsp_helper.c
gdbstub.c
helper.c	target/mips: Implement segmentation control	2017-07-20 22:42:26 +01:00
helper.h	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
kvm_mips.h
kvm.c	vcpu_dirty: share the same field in CPUState for all accelerators	2017-07-04 14:30:03 +02:00
lmi_helper.c
machine.c	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
Makefile.objs
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
TODO
trace-events	target-mips: replace few LOG_DISAS() with trace points	2017-03-20 11:06:32 +00:00
translate_init.c	target/mips: Add EVA support to P5600	2017-07-21 03:23:36 +01:00
translate.c	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00