ef8cabab3c
Add missing include guard in pmu.h to avoid the problem of double inclusion. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240220110907.10479-1-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
39 lines
1.5 KiB
C
39 lines
1.5 KiB
C
/*
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* RISC-V PMU header file.
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef RISCV_PMU_H
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#define RISCV_PMU_H
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#include "cpu.h"
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#include "qapi/error.h"
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bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env,
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uint32_t target_ctr);
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bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env,
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uint32_t target_ctr);
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void riscv_pmu_timer_cb(void *priv);
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void riscv_pmu_init(RISCVCPU *cpu, Error **errp);
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int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value,
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uint32_t ctr_idx);
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int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx);
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void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name);
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int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value,
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uint32_t ctr_idx);
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#endif /* RISCV_PMU_H */
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