qemu/target/openrisc
Richard Henderson 55c3ceef61 qom: Introduce CPUClass.tcg_initialize
Move target cpu tcg initialization to common code,
called from cpu_exec_realizefn.

Acked-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24 22:00:13 +02:00
..
cpu.c qom: Introduce CPUClass.tcg_initialize 2017-10-24 22:00:13 +02:00
cpu.h openrisc/cputimer: Perparation for Multicore 2017-10-21 06:35:47 +09:00
exception_helper.c target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
exception.c
exception.h
fpu_helper.c target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
gdbstub.c target/openrisc: implement shadow registers 2017-05-04 09:39:01 +09:00
helper.h target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
interrupt_helper.c target/openrisc: Tidy ppc/npc implementation 2017-02-14 08:15:00 +11:00
interrupt.c target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
machine.c openrisc/cputimer: Perparation for Multicore 2017-10-21 06:35:47 +09:00
Makefile.objs target/openrisc: Streamline arithmetic and OVE 2017-02-14 08:14:59 +11:00
mmu_helper.c
mmu.c target/openrisc: Fixes for memory debugging 2017-05-04 09:38:49 +09:00
sys_helper.c openrisc/cputimer: Perparation for Multicore 2017-10-21 06:35:47 +09:00
translate.c target: [tcg] Use a generic enum for DISAS_ values 2017-09-06 08:06:47 -07:00