5540cb97f7
aspeed i2c interrupts should be cleared by software only, and the bus interrupt should be lowered when all interrupts have been cleared. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180914063506.20815-2-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: drop TODO comment describing an issue which is fixed later in the patch series, and clean up commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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aspeed_i2c.c | ||
bitbang_i2c.c | ||
bitbang_i2c.h | ||
core.c | ||
exynos4210_i2c.c | ||
i2c-ddc.c | ||
imx_i2c.c | ||
Makefile.objs | ||
omap_i2c.c | ||
pm_smbus.c | ||
ppc4xx_i2c.c | ||
smbus_eeprom.c | ||
smbus_ich9.c | ||
smbus.c | ||
trace-events | ||
versatile_i2c.c |