ff36e90e7c
.. and clean up not longer needed conditionals in DSTD build code pvpanic-isa AML will be fetched and included when ISA bridge will build its own AML code (including attached devices). Expected AML change: the device under separate _SB.PCI0.ISA scope is moved directly under Device(ISA) node. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20220608135340.3304695-29-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
37 lines
746 B
C
37 lines
746 B
C
/*
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* QEMU simulated pvpanic device.
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*
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* Copyright Fujitsu, Corp. 2013
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*
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* Authors:
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* Wen Congyang <wency@cn.fujitsu.com>
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* Hu Tao <hutao@cn.fujitsu.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#ifndef HW_MISC_PVPANIC_H
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#define HW_MISC_PVPANIC_H
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#include "qom/object.h"
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#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"
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#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci"
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#define PVPANIC_IOPORT_PROP "ioport"
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/*
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* PVPanicState for any device type
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*/
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typedef struct PVPanicState PVPanicState;
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struct PVPanicState {
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MemoryRegion mr;
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uint8_t events;
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};
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void pvpanic_setup_io(PVPanicState *s, DeviceState *dev, unsigned size);
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#endif
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