Conor Dooley 53c38f7ab1 hw/riscv: virt: fix uart node name ... "uart" is not a node name that complies with the dt-schema. Change the node name to "serial" to ix warnings seen during dt-validate on a dtbdump of the virt machine such as: /stuff/qemu/qemu.dtb: uart@10000000: $nodename:0: 'uart@10000000' does not match '^serial(@.*)?$' From schema: /stuff/linux/Documentation/devicetree/bindings/serial/8250.yaml Reported-by: Rob Herring <robh@kernel.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Message-id: 20220810184612.157317-2-mail@conchuod.ie Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/ Fixes: 04331d0b56 ("RISC-V VirtIO Machine") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2022-09-07 09:18:33 +02:00
..
boot.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
Kconfig	hw/riscv: Enable TPM backends	2022-04-29 10:48:48 +10:00
meson.build	hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines	2021-07-20 15:32:49 +02:00
microchip_pfsoc.c	hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals	2022-09-07 09:18:33 +02:00
numa.c	hw: Do not include qemu/log.h if it is not necessary	2021-05-02 17:24:50 +02:00
opentitan.c	hw/riscv: opentitan: bump opentitan version	2022-09-07 09:18:33 +02:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
sifive_e.c	hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan)	2022-05-24 10:38:50 +10:00
sifive_u.c	hw/riscv/sifive_u: Resolve redundant property accessors	2022-05-24 10:38:50 +10:00
spike.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
virt.c	hw/riscv: virt: fix uart node name	2022-09-07 09:18:33 +02:00