qemu/target-mips
ths 534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:13:00 +00:00
..
cpu.h Unify IRQ handling. 2007-04-07 18:14:41 +00:00
exec.h Actually enable 64bit configuration. 2007-04-01 12:36:18 +00:00
fop_template.c Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
helper.c cpu_get_phys_page_debug should return target_phys_addr_t 2007-04-07 11:21:28 +00:00
mips-defs.h Actually enable 64bit configuration. 2007-04-01 12:36:18 +00:00
op_helper_mem.c Actually enable 64bit configuration. 2007-04-01 12:36:18 +00:00
op_helper.c Save state for all CP0 instructions, they may throw a CPU exception. 2007-04-06 18:46:01 +00:00
op_mem.c Catch unaligned sc/scd. 2007-04-09 14:14:21 +00:00
op_template.c Preliminiary MIPS64 support, disabled by default due to performance impact. 2006-12-21 01:19:56 +00:00
op.c More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 2007-04-11 02:13:00 +00:00
TODO Update mips TODO. 2007-03-30 18:56:19 +00:00
translate_init.c Actually enable 64bit configuration. 2007-04-01 12:36:18 +00:00
translate.c More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 2007-04-11 02:13:00 +00:00