5325cc34a2
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
191 lines
6.7 KiB
C
191 lines
6.7 KiB
C
/*
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* Xilinx Zynq MPSoC PMU (Power Management Unit) emulation
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*
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* Copyright (C) 2017 Xilinx Inc
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* Written by Alistair Francis <alistair.francis@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "exec/address-spaces.h"
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#include "hw/boards.h"
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#include "cpu.h"
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#include "boot.h"
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#include "hw/intc/xlnx-zynqmp-ipi.h"
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#include "hw/intc/xlnx-pmu-iomod-intc.h"
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/* Define the PMU device */
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#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
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#define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \
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TYPE_XLNX_ZYNQMP_PMU_SOC)
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#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000
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#define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000
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#define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000
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#define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000
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#define XLNX_ZYNQMP_PMU_NUM_IPIS 4
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static const uint64_t ipi_addr[XLNX_ZYNQMP_PMU_NUM_IPIS] = {
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0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000,
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};
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static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = {
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19, 20, 21, 22,
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};
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typedef struct XlnxZynqMPPMUSoCState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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MicroBlazeCPU cpu;
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XlnxPMUIOIntc intc;
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XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS];
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} XlnxZynqMPPMUSoCState;
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static void xlnx_zynqmp_pmu_soc_init(Object *obj)
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{
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XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
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object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU);
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object_initialize_child(obj, "intc", &s->intc, TYPE_XLNX_PMU_IO_INTC);
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/* Create the IPI device */
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for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
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char *name = g_strdup_printf("ipi%d", i);
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object_initialize_child(obj, name, &s->ipi[i], TYPE_XLNX_ZYNQMP_IPI);
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g_free(name);
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}
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}
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static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
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{
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XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
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Error *err = NULL;
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object_property_set_uint(OBJECT(&s->cpu), "base-vectors",
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XLNX_ZYNQMP_PMU_ROM_ADDR, &error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "use-stack-protection", true,
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&error_abort);
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object_property_set_uint(OBJECT(&s->cpu), "use-fpu", 0, &error_abort);
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object_property_set_uint(OBJECT(&s->cpu), "use-hw-mul", 0, &error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "use-barrel", true,
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&error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "use-msr-instr", true,
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&error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "use-pcmp-instr", true,
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&error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "use-mmu", false, &error_abort);
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object_property_set_bool(OBJECT(&s->cpu), "endianness", true,
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&error_abort);
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object_property_set_str(OBJECT(&s->cpu), "version", "8.40.b",
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&error_abort);
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object_property_set_uint(OBJECT(&s->cpu), "pvr", 0, &error_abort);
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if (!qdev_realize(DEVICE(&s->cpu), NULL, &err)) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_uint(OBJECT(&s->intc), "intc-intr-size", 0x10,
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&error_abort);
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object_property_set_uint(OBJECT(&s->intc), "intc-level-edge", 0x0,
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&error_abort);
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object_property_set_uint(OBJECT(&s->intc), "intc-positive", 0xffff,
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&error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err)) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
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qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
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/* Connect the IPI device */
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for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
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sysbus_realize(SYS_BUS_DEVICE(&s->ipi[i]), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i]));
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}
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}
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static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = xlnx_zynqmp_pmu_soc_realize;
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}
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static const TypeInfo xlnx_zynqmp_pmu_soc_type_info = {
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.name = TYPE_XLNX_ZYNQMP_PMU_SOC,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(XlnxZynqMPPMUSoCState),
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.instance_init = xlnx_zynqmp_pmu_soc_init,
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.class_init = xlnx_zynqmp_pmu_soc_class_init,
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};
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static void xlnx_zynqmp_pmu_soc_register_types(void)
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{
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type_register_static(&xlnx_zynqmp_pmu_soc_type_info);
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}
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type_init(xlnx_zynqmp_pmu_soc_register_types)
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/* Define the PMU Machine */
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static void xlnx_zynqmp_pmu_init(MachineState *machine)
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{
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XlnxZynqMPPMUSoCState *pmu = g_new0(XlnxZynqMPPMUSoCState, 1);
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *pmu_rom = g_new(MemoryRegion, 1);
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MemoryRegion *pmu_ram = g_new(MemoryRegion, 1);
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/* Create the ROM */
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memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom",
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XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal);
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memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADDR,
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pmu_rom);
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/* Create the RAM */
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memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram",
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machine->ram_size, &error_fatal);
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memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADDR,
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pmu_ram);
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/* Create the PMU device */
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object_initialize_child(OBJECT(machine), "pmu", pmu,
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TYPE_XLNX_ZYNQMP_PMU_SOC);
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qdev_realize(DEVICE(pmu), NULL, &error_fatal);
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/* Load the kernel */
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microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR,
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machine->ram_size,
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machine->initrd_filename,
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machine->dtb,
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NULL);
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}
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static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc)
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{
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mc->desc = "Xilinx ZynqMP PMU machine";
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mc->init = xlnx_zynqmp_pmu_init;
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}
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DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init)
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