qemu/hw/riscv
Tomasz Jeznach a7aa525b93 hw/riscv/riscv-iommu: add DBG support
DBG support adds three additional registers: tr_req_iova, tr_req_ctl and
tr_response.

The DBG cap is always enabled. No on/off toggle is provided for it.

Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241016204038.649340-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-31 13:51:24 +10:00
..
boot.c
Kconfig hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
meson.build hw/riscv: add riscv-iommu-pci reference device 2024-10-31 13:51:24 +10:00
microchip_pfsoc.c
numa.c
opentitan.c
riscv_hart.c
riscv-iommu-bits.h hw/riscv/riscv-iommu: add DBG support 2024-10-31 13:51:24 +10:00
riscv-iommu-pci.c hw/riscv: add riscv-iommu-pci reference device 2024-10-31 13:51:24 +10:00
riscv-iommu.c hw/riscv/riscv-iommu: add DBG support 2024-10-31 13:51:24 +10:00
riscv-iommu.h hw/riscv/riscv-iommu: add ATS support 2024-10-31 13:51:24 +10:00
shakti_c.c
sifive_e.c
sifive_u.c
spike.c
trace-events hw/riscv/riscv-iommu: add ATS support 2024-10-31 13:51:24 +10:00
trace.h hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
virt-acpi-build.c
virt.c hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug 2024-10-31 13:51:24 +10:00