Bin Meng 5133ed1790 hw/riscv: sifive_u: Add reset functionality ...

The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. Let's set up the GPIO pin#10 and insert a
"gpio-restart" device tree node so that reboot is now functional
with QEMU 'sifive_u' machine.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-10-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2020-06-19 08:25:27 -07:00

..

boot.c

…

Kconfig

hw/char: Initial commit of Ibex UART

2020-06-19 08:24:07 -07:00

Makefile.objs

…

opentitan.c

hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions

2020-06-19 08:24:07 -07:00

riscv_hart.c

qdev: Convert bus-less devices to qdev_realize() with Coccinelle

2020-06-15 22:06:04 +02:00

riscv_htif.c

…

sifive_clint.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_e_prci.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_e.c

hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions

2020-06-19 08:24:07 -07:00

sifive_gpio.c

hw/riscv: sifive_gpio: Do not blindly trigger output IRQs

2020-06-19 08:25:27 -07:00

sifive_plic.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_test.c

sysbus: Convert to sysbus_realize() etc. with Coccinelle

2020-06-15 22:05:28 +02:00

sifive_u_otp.c

…

sifive_u_prci.c

…

sifive_u.c

hw/riscv: sifive_u: Add reset functionality

2020-06-19 08:25:27 -07:00

sifive_uart.c

…

spike.c

sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1

2020-06-15 22:06:04 +02:00

trace-events

…

virt.c

sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1

2020-06-15 22:06:04 +02:00