93d8bc8f5b
drive_get_next() is basically a bad idea. It returns the "next" block backend of a certain interface type. "Next" means bus=0,unit=N, where subsequent calls count N up from zero, per interface type. This lets you define unit numbers implicitly by execution order. If the order changes, or new calls appear "in the middle", unit numbers change. ABI break. Hard to spot in review. Machine "quanta-gbs-bmc" connects just one backend with drive_get_next(), but with a helper function. Change it to use drive_get() directly. This makes the unit numbers explicit in the code. Cc: Havard Skinnemoen <hskinnemoen@google.com> Cc: Tyrone Ting <kfting@nuvoton.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20211117163409.3587705-4-armbru@redhat.com> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
498 lines
16 KiB
C
498 lines
16 KiB
C
/*
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* Machine definitions for boards featuring an NPCM7xx SoC.
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*
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* Copyright 2020 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include "qemu/osdep.h"
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#include "hw/arm/npcm7xx.h"
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#include "hw/core/cpu.h"
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#include "hw/i2c/i2c_mux_pca954x.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/loader.h"
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#include "hw/qdev-core.h"
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#include "hw/qdev-properties.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "qemu/datadir.h"
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#include "qemu/units.h"
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#include "sysemu/blockdev.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/block-backend.h"
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#define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7
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#define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff
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#define QUANTA_GBS_POWER_ON_STRAPS 0x000017ff
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#define KUDO_BMC_POWER_ON_STRAPS 0x00001fff
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static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
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static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
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{
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const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom;
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g_autofree char *filename = NULL;
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int ret;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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if (!filename) {
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error_report("Could not find ROM image '%s'", bios_name);
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if (!machine->kernel_filename) {
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/* We can't boot without a bootrom or a kernel image. */
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exit(1);
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}
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return;
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}
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ret = load_image_mr(filename, &soc->irom);
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if (ret < 0) {
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error_report("Failed to load ROM image '%s'", filename);
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exit(1);
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}
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}
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static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
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const char *flash_type, DriveInfo *dinfo)
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{
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DeviceState *flash;
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qemu_irq flash_cs;
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flash = qdev_new(flash_type);
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if (dinfo) {
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qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
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}
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qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
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flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
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qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
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}
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static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
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{
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memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
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object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
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&error_abort);
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}
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static void sdhci_attach_drive(SDHCIState *sdhci, int unit)
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{
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DriveInfo *di = drive_get(IF_SD, 0, unit);
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BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
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BusState *bus = qdev_get_child_bus(DEVICE(sdhci), "sd-bus");
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if (bus == NULL) {
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error_report("No SD bus found in SOC object");
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exit(1);
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}
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DeviceState *carddev = qdev_new(TYPE_SD_CARD);
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qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
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qdev_realize_and_unref(carddev, bus, &error_fatal);
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}
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static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
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uint32_t hw_straps)
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{
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NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
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MachineClass *mc = MACHINE_CLASS(nmc);
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Object *obj;
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if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
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error_report("This board can only be used with %s",
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mc->default_cpu_type);
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exit(1);
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}
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obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
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&error_abort, NULL);
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object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
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return NPCM7XX(obj);
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}
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static I2CBus *npcm7xx_i2c_get_bus(NPCM7xxState *soc, uint32_t num)
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{
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g_assert(num < ARRAY_SIZE(soc->smbus));
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return I2C_BUS(qdev_get_child_bus(DEVICE(&soc->smbus[num]), "i2c-bus"));
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}
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static void at24c_eeprom_init(NPCM7xxState *soc, int bus, uint8_t addr,
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uint32_t rsize)
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{
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I2CBus *i2c_bus = npcm7xx_i2c_get_bus(soc, bus);
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I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr);
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DeviceState *dev = DEVICE(i2c_dev);
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qdev_prop_set_uint32(dev, "rom-size", rsize);
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i2c_slave_realize_and_unref(i2c_dev, i2c_bus, &error_abort);
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}
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static void npcm7xx_init_pwm_splitter(NPCM7xxMachine *machine,
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NPCM7xxState *soc, const int *fan_counts)
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{
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SplitIRQ *splitters = machine->fan_splitter;
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/*
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* PWM 0~3 belong to module 0 output 0~3.
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* PWM 4~7 belong to module 1 output 0~3.
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*/
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for (int i = 0; i < NPCM7XX_NR_PWM_MODULES; ++i) {
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for (int j = 0; j < NPCM7XX_PWM_PER_MODULE; ++j) {
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int splitter_no = i * NPCM7XX_PWM_PER_MODULE + j;
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DeviceState *splitter;
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if (fan_counts[splitter_no] < 1) {
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continue;
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}
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object_initialize_child(OBJECT(machine), "fan-splitter[*]",
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&splitters[splitter_no], TYPE_SPLIT_IRQ);
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splitter = DEVICE(&splitters[splitter_no]);
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qdev_prop_set_uint16(splitter, "num-lines",
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fan_counts[splitter_no]);
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qdev_realize(splitter, NULL, &error_abort);
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qdev_connect_gpio_out_named(DEVICE(&soc->pwm[i]), "duty-gpio-out",
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j, qdev_get_gpio_in(splitter, 0));
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}
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}
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}
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static void npcm7xx_connect_pwm_fan(NPCM7xxState *soc, SplitIRQ *splitter,
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int fan_no, int output_no)
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{
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DeviceState *fan;
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int fan_input;
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qemu_irq fan_duty_gpio;
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g_assert(fan_no >= 0 && fan_no <= NPCM7XX_MFT_MAX_FAN_INPUT);
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/*
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* Fan 0~1 belong to module 0 input 0~1.
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* Fan 2~3 belong to module 1 input 0~1.
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* ...
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* Fan 14~15 belong to module 7 input 0~1.
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* Fan 16~17 belong to module 0 input 2~3.
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* Fan 18~19 belong to module 1 input 2~3.
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*/
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if (fan_no < 16) {
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fan = DEVICE(&soc->mft[fan_no / 2]);
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fan_input = fan_no % 2;
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} else {
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fan = DEVICE(&soc->mft[(fan_no - 16) / 2]);
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fan_input = fan_no % 2 + 2;
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}
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/* Connect the Fan to PWM module */
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fan_duty_gpio = qdev_get_gpio_in_named(fan, "duty", fan_input);
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qdev_connect_gpio_out(DEVICE(splitter), output_no, fan_duty_gpio);
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}
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static void npcm750_evb_i2c_init(NPCM7xxState *soc)
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{
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/* lm75 temperature sensor on SVB, tmp105 is compatible */
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 0), "tmp105", 0x48);
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/* lm75 temperature sensor on EB, tmp105 is compatible */
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x48);
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/* tmp100 temperature sensor on EB, tmp105 is compatible */
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x48);
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/* tmp100 temperature sensor on SVB, tmp105 is compatible */
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 6), "tmp105", 0x48);
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}
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static void npcm750_evb_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
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{
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SplitIRQ *splitter = machine->fan_splitter;
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static const int fan_counts[] = {2, 2, 2, 2, 2, 2, 2, 2};
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npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
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npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x06, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x07, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x08, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x09, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0a, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0b, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0c, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0d, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0e, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0f, 1);
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}
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static void quanta_gsj_i2c_init(NPCM7xxState *soc)
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{
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/* GSJ machine have 4 max31725 temperature sensors, tmp105 is compatible. */
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x5c);
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x5c);
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 3), "tmp105", 0x5c);
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), "tmp105", 0x5c);
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at24c_eeprom_init(soc, 9, 0x55, 8192);
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at24c_eeprom_init(soc, 10, 0x55, 8192);
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/*
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* i2c-11:
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* - power-brick@36: delta,dps800
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* - hotswap@15: ti,lm5066i
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*/
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/*
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* i2c-12:
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* - ucd90160@6b
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*/
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i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 15), "pca9548", 0x75);
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}
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static void quanta_gsj_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
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{
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SplitIRQ *splitter = machine->fan_splitter;
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static const int fan_counts[] = {2, 2, 2, 0, 0, 0, 0, 0};
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npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
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npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
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npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
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npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
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}
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static void quanta_gbs_i2c_init(NPCM7xxState *soc)
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{
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/*
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* i2c-0:
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* pca9546@71
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*
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* i2c-1:
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* pca9535@24
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* pca9535@20
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* pca9535@21
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* pca9535@22
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* pca9535@23
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* pca9535@25
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* pca9535@26
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*
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* i2c-2:
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* sbtsi@4c
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*
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* i2c-5:
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* atmel,24c64@50 mb_fru
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* pca9546@71
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* - channel 0: max31725@54
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* - channel 1: max31725@55
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* - channel 2: max31725@5d
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* atmel,24c64@51 fan_fru
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* - channel 3: atmel,24c64@52 hsbp_fru
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*
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* i2c-6:
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* pca9545@73
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*
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* i2c-7:
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* pca9545@72
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*
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* i2c-8:
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* adi,adm1272@10
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*
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* i2c-9:
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* pca9546@71
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* - channel 0: isil,isl68137@60
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* - channel 1: isil,isl68137@61
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* - channel 2: isil,isl68137@63
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* - channel 3: isil,isl68137@45
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*
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* i2c-10:
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* pca9545@71
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*
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* i2c-11:
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* pca9545@76
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*
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* i2c-12:
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* maxim,max34451@4e
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* isil,isl68137@5d
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* isil,isl68137@5e
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*
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* i2c-14:
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* pca9545@70
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*/
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}
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static void npcm750_evb_init(MachineState *machine)
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{
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NPCM7xxState *soc;
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soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
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npcm7xx_connect_dram(soc, machine->ram);
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qdev_realize(DEVICE(soc), NULL, &error_fatal);
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npcm7xx_load_bootrom(machine, soc);
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npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0));
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npcm750_evb_i2c_init(soc);
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npcm750_evb_fan_init(NPCM7XX_MACHINE(machine), soc);
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npcm7xx_load_kernel(machine, soc);
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}
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static void quanta_gsj_init(MachineState *machine)
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{
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NPCM7xxState *soc;
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soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
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npcm7xx_connect_dram(soc, machine->ram);
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qdev_realize(DEVICE(soc), NULL, &error_fatal);
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npcm7xx_load_bootrom(machine, soc);
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npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
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drive_get(IF_MTD, 0, 0));
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quanta_gsj_i2c_init(soc);
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quanta_gsj_fan_init(NPCM7XX_MACHINE(machine), soc);
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npcm7xx_load_kernel(machine, soc);
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}
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static void quanta_gbs_init(MachineState *machine)
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{
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NPCM7xxState *soc;
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soc = npcm7xx_create_soc(machine, QUANTA_GBS_POWER_ON_STRAPS);
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npcm7xx_connect_dram(soc, machine->ram);
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qdev_realize(DEVICE(soc), NULL, &error_fatal);
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npcm7xx_load_bootrom(machine, soc);
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npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
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drive_get(IF_MTD, 0, 0));
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quanta_gbs_i2c_init(soc);
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sdhci_attach_drive(&soc->mmc.sdhci, 0);
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npcm7xx_load_kernel(machine, soc);
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}
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static void kudo_bmc_init(MachineState *machine)
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{
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NPCM7xxState *soc;
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soc = npcm7xx_create_soc(machine, KUDO_BMC_POWER_ON_STRAPS);
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npcm7xx_connect_dram(soc, machine->ram);
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qdev_realize(DEVICE(soc), NULL, &error_fatal);
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npcm7xx_load_bootrom(machine, soc);
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npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
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drive_get(IF_MTD, 0, 0));
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npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
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drive_get(IF_MTD, 3, 0));
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npcm7xx_load_kernel(machine, soc);
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}
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static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
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{
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NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
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MachineClass *mc = MACHINE_CLASS(nmc);
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nmc->soc_type = type;
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mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
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}
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static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->no_floppy = 1;
|
|
mc->no_cdrom = 1;
|
|
mc->no_parallel = 1;
|
|
mc->default_ram_id = "ram";
|
|
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
|
|
}
|
|
|
|
/*
|
|
* Schematics:
|
|
* https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
|
|
*/
|
|
static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
|
|
|
|
mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex-A9)";
|
|
mc->init = npcm750_evb_init;
|
|
mc->default_ram_size = 512 * MiB;
|
|
};
|
|
|
|
static void gsj_machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
|
|
|
|
mc->desc = "Quanta GSJ (Cortex-A9)";
|
|
mc->init = quanta_gsj_init;
|
|
mc->default_ram_size = 512 * MiB;
|
|
};
|
|
|
|
static void gbs_bmc_machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
|
|
|
|
mc->desc = "Quanta GBS (Cortex-A9)";
|
|
mc->init = quanta_gbs_init;
|
|
mc->default_ram_size = 1 * GiB;
|
|
}
|
|
|
|
static void kudo_bmc_machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
|
|
|
|
mc->desc = "Kudo BMC (Cortex-A9)";
|
|
mc->init = kudo_bmc_init;
|
|
mc->default_ram_size = 1 * GiB;
|
|
};
|
|
|
|
static const TypeInfo npcm7xx_machine_types[] = {
|
|
{
|
|
.name = TYPE_NPCM7XX_MACHINE,
|
|
.parent = TYPE_MACHINE,
|
|
.instance_size = sizeof(NPCM7xxMachine),
|
|
.class_size = sizeof(NPCM7xxMachineClass),
|
|
.class_init = npcm7xx_machine_class_init,
|
|
.abstract = true,
|
|
}, {
|
|
.name = MACHINE_TYPE_NAME("npcm750-evb"),
|
|
.parent = TYPE_NPCM7XX_MACHINE,
|
|
.class_init = npcm750_evb_machine_class_init,
|
|
}, {
|
|
.name = MACHINE_TYPE_NAME("quanta-gsj"),
|
|
.parent = TYPE_NPCM7XX_MACHINE,
|
|
.class_init = gsj_machine_class_init,
|
|
}, {
|
|
.name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
|
|
.parent = TYPE_NPCM7XX_MACHINE,
|
|
.class_init = gbs_bmc_machine_class_init,
|
|
}, {
|
|
.name = MACHINE_TYPE_NAME("kudo-bmc"),
|
|
.parent = TYPE_NPCM7XX_MACHINE,
|
|
.class_init = kudo_bmc_machine_class_init,
|
|
},
|
|
};
|
|
|
|
DEFINE_TYPES(npcm7xx_machine_types)
|