0990ce6a2e
SpaprInterruptControllerClass and PnvChipClass have an intc_create() method that calls the appropriate routine, ie. icp_create() or xive_tctx_create(), to establish the link between the VCPU and the presenter component of the interrupt controller during realize. There aren't any symmetrical call to be called when the VCPU gets unrealized though. It is assumed that object_unparent() is the only thing to do. This is questionable because the parenting logic around the CPU and presenter objects is really an implementation detail of the interrupt controller. It shouldn't be open-coded in the machine code. Fix this by adding an intc_destroy() method that undoes what was done in intc_create(). Also NULLify the presenter pointers to avoid having stale pointers around. This will allow to reliably check if a vCPU has a valid presenter. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157192724208.3146912.7254684777515287626.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
112 lines
4.3 KiB
C
112 lines
4.3 KiB
C
/*
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* QEMU PowerPC sPAPR IRQ backend definitions
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*
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* Copyright (c) 2018, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef HW_SPAPR_IRQ_H
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#define HW_SPAPR_IRQ_H
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#include "target/ppc/cpu-qom.h"
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/*
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* IRQ range offsets per device type
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*/
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#define SPAPR_IRQ_IPI 0x0
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#define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */
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#define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000)
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#define SPAPR_IRQ_HOTPLUG (SPAPR_XIRQ_BASE + 0x0001)
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#define SPAPR_IRQ_VIO (SPAPR_XIRQ_BASE + 0x0100) /* 256 VIO devices */
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#define SPAPR_IRQ_PCI_LSI (SPAPR_XIRQ_BASE + 0x0200) /* 32+ PHBs devices */
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/* Offset of the dynamic range covered by the bitmap allocator */
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#define SPAPR_IRQ_MSI (SPAPR_XIRQ_BASE + 0x0300)
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#define SPAPR_NR_XIRQS 0x1000
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typedef struct SpaprMachineState SpaprMachineState;
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typedef struct SpaprInterruptController SpaprInterruptController;
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#define TYPE_SPAPR_INTC "spapr-interrupt-controller"
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#define SPAPR_INTC(obj) \
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INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC)
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#define SPAPR_INTC_CLASS(klass) \
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OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC)
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#define SPAPR_INTC_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC)
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typedef struct SpaprInterruptControllerClass {
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InterfaceClass parent;
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int (*activate)(SpaprInterruptController *intc, Error **errp);
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void (*deactivate)(SpaprInterruptController *intc);
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/*
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* These methods will typically be called on all intcs, active and
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* inactive
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*/
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int (*cpu_intc_create)(SpaprInterruptController *intc,
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PowerPCCPU *cpu, Error **errp);
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void (*cpu_intc_reset)(SpaprInterruptController *intc, PowerPCCPU *cpu);
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void (*cpu_intc_destroy)(SpaprInterruptController *intc, PowerPCCPU *cpu);
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int (*claim_irq)(SpaprInterruptController *intc, int irq, bool lsi,
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Error **errp);
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void (*free_irq)(SpaprInterruptController *intc, int irq);
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/* These methods should only be called on the active intc */
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void (*set_irq)(SpaprInterruptController *intc, int irq, int val);
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void (*print_info)(SpaprInterruptController *intc, Monitor *mon);
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void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
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void *fdt, uint32_t phandle);
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int (*post_load)(SpaprInterruptController *intc, int version_id);
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} SpaprInterruptControllerClass;
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void spapr_irq_update_active_intc(SpaprMachineState *spapr);
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int spapr_irq_cpu_intc_create(SpaprMachineState *spapr,
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PowerPCCPU *cpu, Error **errp);
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void spapr_irq_cpu_intc_reset(SpaprMachineState *spapr, PowerPCCPU *cpu);
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void spapr_irq_cpu_intc_destroy(SpaprMachineState *spapr, PowerPCCPU *cpu);
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void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon);
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void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers,
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void *fdt, uint32_t phandle);
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uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr);
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int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align,
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Error **errp);
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void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num);
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typedef struct SpaprIrq {
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bool xics;
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bool xive;
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} SpaprIrq;
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extern SpaprIrq spapr_irq_xics;
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extern SpaprIrq spapr_irq_xics_legacy;
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extern SpaprIrq spapr_irq_xive;
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extern SpaprIrq spapr_irq_dual;
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void spapr_irq_init(SpaprMachineState *spapr, Error **errp);
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int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp);
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void spapr_irq_free(SpaprMachineState *spapr, int irq, int num);
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qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq);
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int spapr_irq_post_load(SpaprMachineState *spapr, int version_id);
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void spapr_irq_reset(SpaprMachineState *spapr, Error **errp);
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int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp);
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int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController *, Error **),
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SpaprInterruptController *intc,
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Error **errp);
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/*
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* XICS legacy routines
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*/
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int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp);
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#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
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#endif
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