Richard Henderson 4e97d459a0 target/riscv: Properly check SEW in amo_op ... We're currently assuming SEW <= 3, and the "else" from the SEW == 3 must be less. Use a switch and explicitly bound both SEW and SEQ for all cases. Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20211020031709.359469-8-richard.henderson@linaro.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-10-22 07:47:51 +10:00
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insn_trans	target/riscv: Properly check SEW in amo_op	2021-10-22 07:47:51 +10:00
arch_dump.c
bitmanip_helper.c
cpu_bits.h
cpu_helper.c
cpu_user.h
cpu-param.h
cpu.c
cpu.h
csr.c
fpu_helper.c
gdbstub.c
helper.h
insn16.decode
insn32.decode
instmap.h
internals.h
Kconfig
machine.c
meson.build
monitor.c
op_helper.c
pmp.c
pmp.h
trace-events
trace.h
translate.c
vector_helper.c