Philippe Mathieu-Daudé 4d1524d2ce target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3 ... Use the single ISA_MIPS32R3 definition to check if the Release 3 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R3 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-9-f4bug@amsat.org>		2021-01-14 17:13:53 +01:00
..
addr.c	target/mips/addr: Add translation helpers for KSEG1	2021-01-14 17:13:53 +01:00
cp0_helper.c	target/mips: Introduce ase_mt_available() helper	2020-12-13 20:26:02 +01:00
cp0_timer.c
cpu-param.h
cpu-qom.h
cpu.c	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
cpu.h	target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit()	2021-01-14 17:13:53 +01:00
dsp_helper.c
fpu_helper.c	target/mips: Use FloatRoundMode enum for FCR31 modes conversion	2020-12-13 20:27:11 +01:00
gdbstub.c
helper.c	target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c	2020-12-13 20:26:02 +01:00
helper.h
internal.h	target/mips: Use FloatRoundMode enum for FCR31 modes conversion	2020-12-13 20:27:11 +01:00
kvm_mips.h
kvm.c
lmmi_helper.c
machine.c	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
meson.build	hw/mips: Move address translation helpers to target/mips/	2020-12-13 19:58:54 +01:00
mips-defs.h	target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3	2021-01-14 17:13:53 +01:00
mips-semi.c
msa_helper.c
op_helper.c	target/mips: Remove unused headers from op_helper.c	2020-12-13 20:26:02 +01:00
TODO
trace-events
trace.h
translate_init.c.inc	target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1	2021-01-14 17:13:53 +01:00
translate.c	target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2	2021-01-14 17:13:53 +01:00