qemu/target/i386/cpu-param.h
Philippe Mathieu-Daudé e92dd33224 target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'
accel/tcg/ files requires the following definitions:

  - TARGET_LONG_BITS
  - TARGET_PAGE_BITS
  - TARGET_PHYS_ADDR_SPACE_BITS
  - TCG_GUEST_DEFAULT_MO

The first 3 are defined in "cpu-param.h". The last one
in "cpu.h", with a bunch of definitions irrelevant for
TCG. By moving the TCG_GUEST_DEFAULT_MO definition to
"cpu-param.h", we can simplify various accel/tcg includes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20231211212003.21686-4-philmd@linaro.org>
2024-04-26 15:31:37 +02:00

31 lines
806 B
C

/*
* i386 cpu parameters for qemu.
*
* Copyright (c) 2003 Fabrice Bellard
* SPDX-License-Identifier: LGPL-2.0+
*/
#ifndef I386_CPU_PARAM_H
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
/*
* ??? This is really 48 bits, sign-extended, but the only thing
* accessible to userland with bit 48 set is the VSYSCALL, and that
* is handled via other mechanisms.
*/
# define TARGET_VIRT_ADDR_SPACE_BITS 47
#else
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#define TARGET_PAGE_BITS 12
/* The x86 has a strong memory model with some store-after-load re-ordering */
#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
#endif