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4ae7d11b70
qemu/target/ppc
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Peter Maydell 4ae7d11b70 target/ppc: Fix lxvx/stxvx facility check 
linux-user: update syscall_nr.h to Linux v6.10
 linux-user: update syscall.tbl to Linux v6.11
 tcg: Fix iteration step in 32-bit gvec operation
 tcg: Propagate new TCGOp to add_as_label_use
 tcg/*: Do not expand cmp_vec, cmpsel_vec early
 tcg/optimize: Fold movcond with true and false values identical
 tcg/optimize: Optimize cmp_vec and cmpsel_vec
 tcg/optimize: Optimize bitsel_vec
 tcg/i386: Optimize cmpsel with constant 0 operand 3.
 tcg/i386: Implement cmp_vec with avx512 insns
 tcg/i386: Implement cmpsel_vec with avx512 insns
 tcg/i386: Implement vector TST{EQ,NE} for avx512
 tcg/ppc: Implement cmpsel_vec and optimize with constant 0/-1 arguments
 tcg/s390x: Implement cmpsel_vec and optimize with constant 0/-1 arguments
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Merge tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu into staging

target/ppc: Fix lxvx/stxvx facility check
linux-user: update syscall_nr.h to Linux v6.10
linux-user: update syscall.tbl to Linux v6.11
tcg: Fix iteration step in 32-bit gvec operation
tcg: Propagate new TCGOp to add_as_label_use
tcg/*: Do not expand cmp_vec, cmpsel_vec early
tcg/optimize: Fold movcond with true and false values identical
tcg/optimize: Optimize cmp_vec and cmpsel_vec
tcg/optimize: Optimize bitsel_vec
tcg/i386: Optimize cmpsel with constant 0 operand 3.
tcg/i386: Implement cmp_vec with avx512 insns
tcg/i386: Implement cmpsel_vec with avx512 insns
tcg/i386: Implement vector TST{EQ,NE} for avx512
tcg/ppc: Implement cmpsel_vec and optimize with constant 0/-1 arguments
tcg/s390x: Implement cmpsel_vec and optimize with constant 0/-1 arguments

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# gpg: Signature made Sun 22 Sep 2024 13:00:02 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu: (31 commits)
  linux-user: update syscall.tbl to Linux v6.11
  linux-user,loongarch: move to syscalltbl file
  linux-user,hexagon: move to syscalltbl file
  linux-user,riscv: move to syscalltbl file
  linux-user,openrisc: move to syscalltbl file
  linux-user,aarch64: move to syscalltbl file
  linux-user: update syscall.tbl to Linux v6.10
  linux-user, mips: update syscall-args-o32.c.inc to Linux v6.10
  linux-user: update syscall_nr.h to Linux v6.10
  target/ppc: Fix lxvx/stxvx facility check
  tcg/s390x: Optimize cmpsel with constant 0/-1 arguments
  tcg/s390x: Implement cmpsel_vec
  tcg/ppc: Optimize cmpsel with constant 0/-1 arguments
  tcg/ppc: Implement cmpsel_vec
  tcg/i386: Implement vector TST{EQ,NE} for avx512
  tcg/i386: Implement cmpsel_vec with avx512 insns
  tcg/i386: Add predicate parameters to tcg_out_evex_opc
  tcg/i386: Implement cmp_vec with avx512 insns
  tcg/i386: Optimize cmpsel with constant 0 operand 3.
  tcg/optimize: Optimize bitsel_vec
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-27 10:32:29 +01:00
..
translate target/ppc: Fix lxvx/stxvx facility check 2024-09-22 06:55:21 +02:00
arch_dump.c target/ppc/arch_dump: set prstatus pid to cpuid 2024-07-26 09:21:06 +10:00
compat.c spapr: Fix machine reset deadlock from replay-record 2023-09-06 11:19:33 +02:00
cpu_init.c ppc/pnv: Add an LPAR per core machine option 2024-07-26 09:21:06 +10:00
cpu-models.c ppc: Drop support for POWER9 and POWER10 DD1 chips 2024-03-13 02:47:04 +10:00
cpu-models.h ppc: spelling fixes 2023-09-20 07:54:34 +03:00
cpu-param.h license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
cpu-qom.h target/ppc: Use GDBFeature for dynamic XML 2024-02-28 09:09:25 +00:00
cpu.c target/ppc: Flush inputs to zero with NJ in ppc_store_vscr 2023-09-06 11:19:33 +02:00
cpu.h ppc: Add has_smt_siblings property to CPUPPCState 2024-07-26 09:21:06 +10:00
dfp_helper.c target/ppc: Fix warning with clang-15 2023-02-27 22:29:01 +01:00
excp_helper.c target/ppc: Add helpers to check for SMT sibling threads 2024-07-26 09:21:06 +10:00
fpu_helper.c target/ppc: Move VSX fp compare insns to decodetree. 2024-07-26 09:51:33 +10:00
gdbstub.c target/ppc: Fix GDB register indexing on secondary CPUs 2024-03-30 18:50:24 +10:00
helper_regs.c target/ppc: Remove id_tlbs flag from CPU env 2024-05-24 09:43:11 +10:00
helper_regs.h target/ppc: Fix PMU hflags calculation 2023-06-10 10:19:24 -03:00
helper.h target/ppc: Move VSX fp compare insns to decodetree. 2024-07-26 09:51:33 +10:00
insn32.decode target/ppc: Move VSX fp compare insns to decodetree. 2024-07-26 09:51:33 +10:00
insn64.decode target/ppc: Implemented [pm]xvbf16ger2* 2022-05-26 17:11:33 -03:00
int_helper.c target/ppc: Move VMX integer add/sub saturate insns to decodetree. 2024-07-26 09:51:33 +10:00
internal.h target/ppc: Add a function to check for page protection bit 2024-05-24 09:43:13 +10:00
Kconfig ppc: switch boards to "default y" 2024-05-03 15:47:47 +02:00
kvm_ppc.h target/ppc: Prohibit target specific KVM prototypes on user emulation 2023-11-07 12:13:28 +01:00
kvm.c target/ppc: handle vcpu hotplug failure gracefully 2024-07-26 09:21:06 +10:00
machine.c target/ppc: Fix migration of CPUs with TLB_EMB TLB type 2024-09-03 16:24:37 -03:00
mem_helper.c target/ppc: Move VSX vector with length storage access insns to decodetree. 2024-07-26 09:51:33 +10:00
meson.build target/ppc: Move out BookE and related MMU functions from mmu_common.c 2024-05-24 09:43:13 +10:00
misc_helper.c ppc/pnv: Implement Power9 CPU core thread state indirect register 2024-07-26 09:21:06 +10:00
mmu_common.c target/ppc/mmu_common.c: Remove mmu_ctx_t 2024-07-26 09:51:34 +10:00
mmu_helper.c target/ppc: Move out BookE and related MMU functions from mmu_common.c 2024-05-24 09:43:13 +10:00
mmu-book3s-v3.c target/ppc/mmu-radix64: Remove externally unused parts from header 2024-07-26 09:51:34 +10:00
mmu-book3s-v3.h target/ppc: Remove includes from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
mmu-booke.c target/ppc: Move out BookE and related MMU functions from mmu_common.c 2024-05-24 09:43:13 +10:00
mmu-booke.h target/ppc: Move out BookE and related MMU functions from mmu_common.c 2024-05-24 09:43:13 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc/mmu-hash32.c: Move get_pteg_offset32() to the header 2024-07-26 09:51:34 +10:00
mmu-hash32.h target/ppc/mmu-hash32.c: Move get_pteg_offset32() to the header 2024-07-26 09:51:34 +10:00
mmu-hash64.c target/ppc: Remove includes from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
mmu-hash64.h target/ppc: Unexport some functions from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
mmu-radix64.c target/ppc: Remove includes from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
mmu-radix64.h target/ppc/mmu-radix64: Remove externally unused parts from header 2024-07-26 09:51:34 +10:00
power8-pmu-regs.c.inc target/ppc: Add new hflags to support BHRB 2024-05-24 08:57:50 +10:00
power8-pmu.c target/ppc: Add recording of taken branches to BHRB 2024-05-24 09:33:06 +10:00
power8-pmu.h target/ppc: Add recording of taken branches to BHRB 2024-05-24 09:33:06 +10:00
ppc-qmp-cmds.c target/ppc: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
spr_common.h target/ppc: Implement SPRC/SPRD SPRs 2024-05-24 09:34:40 +10:00
tcg-stub.c hw/ppc/spapr_hcall: Allow elision of softmmu_resize_hpt_prep 2024-02-23 23:24:42 +10:00
timebase_helper.c ppc/pnv: Add POWER10 ChipTOD quirk for big-core 2024-07-26 09:21:06 +10:00
trace-events target/ppc: Improve KVM hypercall trace 2022-04-20 18:00:30 -03:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc. 2024-07-26 09:51:33 +10:00
user_only_helper.c target/ppc: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00