qemu/hw/riscv
Alistair Francis 38bc4e34f2 hw/riscv: Load the kernel after the firmware
Instead of loading the kernel at a hardcoded start address, let's load
the kernel at the next aligned address after the end of the firmware.

This should have no impact for current users of OpenSBI, but will
allow loading a noMMU kernel at the start of memory.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-id: 46c00c4f15b42feb792090e3d74359e180a6d954.1602634524.git.alistair.francis@wdc.com
2020-10-22 12:00:22 -07:00
..
boot.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
Kconfig hw/riscv: Sort the Kconfig options in alphabetical order 2020-09-09 15:54:19 -07:00
meson.build hw/riscv: Always build riscv_hart.c 2020-09-09 15:54:19 -07:00
microchip_pfsoc.c hw/riscv: Move sifive_plic model to hw/intc 2020-09-09 15:54:19 -07:00
numa.c
opentitan.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
riscv_hart.c
sifive_e.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
sifive_u.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
spike.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
virt.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00