8e8cbed09a
Commitc87759ce87
fixed a regression affecting pc-q35 machines by introducing a new pc-q35-4.0.1 machine version to be used instead of pc-q35-4.0. The only purpose was to revert the default behaviour of not using split irqchip, but the change also introduced the usual hw_compat and pc_compat bits, and wired them for pc-q35 only. This raises questions when it comes to add new compat properties for 4.0* machine versions of any architecture. Where to add them ? In 4.0, 4.0.1 or both ? Error prone. Another possibility would be to teach all other architectures about 4.0.1. This solution isn't satisfying, especially since this is a pc-q35 specific issue. It turns out that the split irqchip default is handled in the machine option function and doesn't involve compat lists at all. Drop all the 4.0.1 compat lists and use the 4.0 ones instead in the 4.0.1 machine option function. Move the compat props that were added to the 4.0.1 sincec87759ce87
to 4.0. Even if only hw_compat_4_0_1 had an impact on other architectures, drop pc_compat_4_0_1 as well for consistency. Fixes:c87759ce87
"q35: Revert to kernel irqchip" Suggested-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <156051774276.244890.8660277280145466396.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
1077 lines
33 KiB
C
1077 lines
33 KiB
C
/*
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* QEMU Machine
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*
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* Copyright (C) 2014 Red Hat Inc
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*
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* Authors:
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* Marcel Apfelbaum <marcel.a@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "hw/boards.h"
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#include "qapi/error.h"
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#include "qapi/qapi-visit-common.h"
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#include "qapi/visitor.h"
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#include "hw/sysbus.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "qemu/error-report.h"
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#include "sysemu/qtest.h"
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#include "hw/pci/pci.h"
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#include "hw/mem/nvdimm.h"
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GlobalProperty hw_compat_4_0[] = {
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{ "VGA", "edid", "false" },
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{ "secondary-vga", "edid", "false" },
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{ "bochs-display", "edid", "false" },
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{ "virtio-vga", "edid", "false" },
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{ "virtio-gpu-pci", "edid", "false" },
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};
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const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
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GlobalProperty hw_compat_3_1[] = {
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{ "pcie-root-port", "x-speed", "2_5" },
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{ "pcie-root-port", "x-width", "1" },
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{ "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
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{ "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
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{ "tpm-crb", "ppi", "false" },
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{ "tpm-tis", "ppi", "false" },
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{ "usb-kbd", "serial", "42" },
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{ "usb-mouse", "serial", "42" },
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{ "usb-tablet", "serial", "42" },
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{ "virtio-blk-device", "discard", "false" },
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{ "virtio-blk-device", "write-zeroes", "false" },
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};
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const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
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GlobalProperty hw_compat_3_0[] = {};
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const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
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GlobalProperty hw_compat_2_12[] = {
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{ "migration", "decompress-error-check", "off" },
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{ "hda-audio", "use-timer", "false" },
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{ "cirrus-vga", "global-vmstate", "true" },
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{ "VGA", "global-vmstate", "true" },
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{ "vmware-svga", "global-vmstate", "true" },
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{ "qxl-vga", "global-vmstate", "true" },
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};
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const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
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GlobalProperty hw_compat_2_11[] = {
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{ "hpet", "hpet-offset-saved", "false" },
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{ "virtio-blk-pci", "vectors", "2" },
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{ "vhost-user-blk-pci", "vectors", "2" },
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{ "e1000", "migrate_tso_props", "off" },
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};
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const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
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GlobalProperty hw_compat_2_10[] = {
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{ "virtio-mouse-device", "wheel-axis", "false" },
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{ "virtio-tablet-device", "wheel-axis", "false" },
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};
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const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
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GlobalProperty hw_compat_2_9[] = {
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{ "pci-bridge", "shpc", "off" },
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{ "intel-iommu", "pt", "off" },
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{ "virtio-net-device", "x-mtu-bypass-backend", "off" },
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{ "pcie-root-port", "x-migrate-msix", "false" },
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};
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const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
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GlobalProperty hw_compat_2_8[] = {
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{ "fw_cfg_mem", "x-file-slots", "0x10" },
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{ "fw_cfg_io", "x-file-slots", "0x10" },
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{ "pflash_cfi01", "old-multiple-chip-handling", "on" },
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{ "pci-bridge", "shpc", "on" },
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{ TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
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{ "virtio-pci", "x-pcie-deverr-init", "off" },
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{ "virtio-pci", "x-pcie-lnkctl-init", "off" },
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{ "virtio-pci", "x-pcie-pm-init", "off" },
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{ "cirrus-vga", "vgamem_mb", "8" },
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{ "isa-cirrus-vga", "vgamem_mb", "8" },
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};
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const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
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GlobalProperty hw_compat_2_7[] = {
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{ "virtio-pci", "page-per-vq", "on" },
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{ "virtio-serial-device", "emergency-write", "off" },
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{ "ioapic", "version", "0x11" },
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{ "intel-iommu", "x-buggy-eim", "true" },
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{ "virtio-pci", "x-ignore-backend-features", "on" },
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};
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const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
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GlobalProperty hw_compat_2_6[] = {
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{ "virtio-mmio", "format_transport_address", "off" },
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/*
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* don't include devices which are modern-only
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* ie keyboard, mouse, tablet, gpu, vga & crypto
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*/
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{ "virtio-9p-pci", "disable-modern", "on" },
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{ "virtio-9p-pci", "disable-legacy", "off" },
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{ "virtio-balloon-pci", "disable-modern", "on" },
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{ "virtio-balloon-pci", "disable-legacy", "off" },
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{ "virtio-blk-pci", "disable-modern", "on" },
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{ "virtio-blk-pci", "disable-legacy", "off" },
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{ "virtio-input-host-pci", "disable-modern", "on" },
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{ "virtio-input-host-pci", "disable-legacy", "off" },
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{ "virtio-net-pci", "disable-modern", "on" },
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{ "virtio-net-pci", "disable-legacy", "off" },
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{ "virtio-rng-pci", "disable-modern", "on" },
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{ "virtio-rng-pci", "disable-legacy", "off" },
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{ "virtio-scsi-pci", "disable-modern", "on" },
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{ "virtio-scsi-pci", "disable-legacy", "off" },
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{ "virtio-serial-pci", "disable-modern", "on" },
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{ "virtio-serial-pci", "disable-legacy", "off" },
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};
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const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
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GlobalProperty hw_compat_2_5[] = {
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{ "isa-fdc", "fallback", "144" },
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{ "pvscsi", "x-old-pci-configuration", "on" },
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{ "pvscsi", "x-disable-pcie", "on" },
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{ "vmxnet3", "x-old-msi-offsets", "on" },
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{ "vmxnet3", "x-disable-pcie", "on" },
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};
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const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
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GlobalProperty hw_compat_2_4[] = {
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{ "virtio-blk-device", "scsi", "true" },
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{ "e1000", "extra_mac_registers", "off" },
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{ "virtio-pci", "x-disable-pcie", "on" },
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{ "virtio-pci", "migrate-extra", "off" },
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{ "fw_cfg_mem", "dma_enabled", "off" },
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{ "fw_cfg_io", "dma_enabled", "off" }
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};
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const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
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GlobalProperty hw_compat_2_3[] = {
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{ "virtio-blk-pci", "any_layout", "off" },
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{ "virtio-balloon-pci", "any_layout", "off" },
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{ "virtio-serial-pci", "any_layout", "off" },
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{ "virtio-9p-pci", "any_layout", "off" },
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{ "virtio-rng-pci", "any_layout", "off" },
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{ TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
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{ "migration", "send-configuration", "off" },
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{ "migration", "send-section-footer", "off" },
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{ "migration", "store-global-state", "off" },
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};
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const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
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GlobalProperty hw_compat_2_2[] = {};
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const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
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GlobalProperty hw_compat_2_1[] = {
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{ "intel-hda", "old_msi_addr", "on" },
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{ "VGA", "qemu-extended-regs", "off" },
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{ "secondary-vga", "qemu-extended-regs", "off" },
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{ "virtio-scsi-pci", "any_layout", "off" },
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{ "usb-mouse", "usb_version", "1" },
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{ "usb-kbd", "usb_version", "1" },
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{ "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
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};
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const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
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static char *machine_get_accel(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->accel);
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}
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static void machine_set_accel(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->accel);
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ms->accel = g_strdup(value);
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}
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static void machine_set_kernel_irqchip(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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Error *err = NULL;
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MachineState *ms = MACHINE(obj);
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OnOffSplit mode;
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visit_type_OnOffSplit(v, name, &mode, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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} else {
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switch (mode) {
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case ON_OFF_SPLIT_ON:
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ms->kernel_irqchip_allowed = true;
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ms->kernel_irqchip_required = true;
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ms->kernel_irqchip_split = false;
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break;
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case ON_OFF_SPLIT_OFF:
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ms->kernel_irqchip_allowed = false;
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ms->kernel_irqchip_required = false;
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ms->kernel_irqchip_split = false;
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break;
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case ON_OFF_SPLIT_SPLIT:
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ms->kernel_irqchip_allowed = true;
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ms->kernel_irqchip_required = true;
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ms->kernel_irqchip_split = true;
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break;
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default:
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/* The value was checked in visit_type_OnOffSplit() above. If
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* we get here, then something is wrong in QEMU.
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*/
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abort();
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}
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}
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}
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static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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int64_t value = ms->kvm_shadow_mem;
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visit_type_int(v, name, &value, errp);
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}
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static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, name, &value, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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ms->kvm_shadow_mem = value;
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}
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static char *machine_get_kernel(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->kernel_filename);
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}
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static void machine_set_kernel(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->kernel_filename);
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ms->kernel_filename = g_strdup(value);
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}
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static char *machine_get_initrd(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->initrd_filename);
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}
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static void machine_set_initrd(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->initrd_filename);
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ms->initrd_filename = g_strdup(value);
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}
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static char *machine_get_append(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->kernel_cmdline);
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}
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static void machine_set_append(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->kernel_cmdline);
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ms->kernel_cmdline = g_strdup(value);
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}
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static char *machine_get_dtb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dtb);
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}
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static void machine_set_dtb(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dtb);
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ms->dtb = g_strdup(value);
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}
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static char *machine_get_dumpdtb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dumpdtb);
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}
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static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dumpdtb);
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ms->dumpdtb = g_strdup(value);
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}
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static void machine_get_phandle_start(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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int64_t value = ms->phandle_start;
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visit_type_int(v, name, &value, errp);
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}
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static void machine_set_phandle_start(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, name, &value, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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ms->phandle_start = value;
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}
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static char *machine_get_dt_compatible(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dt_compatible);
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}
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static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dt_compatible);
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ms->dt_compatible = g_strdup(value);
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}
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static bool machine_get_dump_guest_core(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->dump_guest_core;
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}
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static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->dump_guest_core = value;
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}
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static bool machine_get_mem_merge(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->mem_merge;
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}
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static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->mem_merge = value;
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}
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static bool machine_get_usb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->usb;
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}
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static void machine_set_usb(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->usb = value;
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ms->usb_disabled = !value;
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}
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static bool machine_get_graphics(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->enable_graphics;
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}
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static void machine_set_graphics(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->enable_graphics = value;
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}
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static bool machine_get_igd_gfx_passthru(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->igd_gfx_passthru;
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}
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|
|
static void machine_set_igd_gfx_passthru(Object *obj, bool value, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
ms->igd_gfx_passthru = value;
|
|
}
|
|
|
|
static char *machine_get_firmware(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return g_strdup(ms->firmware);
|
|
}
|
|
|
|
static void machine_set_firmware(Object *obj, const char *value, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
g_free(ms->firmware);
|
|
ms->firmware = g_strdup(value);
|
|
}
|
|
|
|
static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
ms->suppress_vmdesc = value;
|
|
}
|
|
|
|
static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return ms->suppress_vmdesc;
|
|
}
|
|
|
|
static void machine_set_enforce_config_section(Object *obj, bool value,
|
|
Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
warn_report("enforce-config-section is deprecated, please use "
|
|
"-global migration.send-configuration=on|off instead");
|
|
|
|
ms->enforce_config_section = value;
|
|
}
|
|
|
|
static bool machine_get_enforce_config_section(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return ms->enforce_config_section;
|
|
}
|
|
|
|
static char *machine_get_memory_encryption(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return g_strdup(ms->memory_encryption);
|
|
}
|
|
|
|
static void machine_set_memory_encryption(Object *obj, const char *value,
|
|
Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
g_free(ms->memory_encryption);
|
|
ms->memory_encryption = g_strdup(value);
|
|
}
|
|
|
|
static bool machine_get_nvdimm(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return ms->nvdimms_state->is_enabled;
|
|
}
|
|
|
|
static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
ms->nvdimms_state->is_enabled = value;
|
|
}
|
|
|
|
static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
return g_strdup(ms->nvdimms_state->persistence_string);
|
|
}
|
|
|
|
static void machine_set_nvdimm_persistence(Object *obj, const char *value,
|
|
Error **errp)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
NVDIMMState *nvdimms_state = ms->nvdimms_state;
|
|
|
|
if (strcmp(value, "cpu") == 0) {
|
|
nvdimms_state->persistence = 3;
|
|
} else if (strcmp(value, "mem-ctrl") == 0) {
|
|
nvdimms_state->persistence = 2;
|
|
} else {
|
|
error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
|
|
value);
|
|
return;
|
|
}
|
|
|
|
g_free(nvdimms_state->persistence_string);
|
|
nvdimms_state->persistence_string = g_strdup(value);
|
|
}
|
|
|
|
void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
|
|
{
|
|
strList *item = g_new0(strList, 1);
|
|
|
|
item->value = g_strdup(type);
|
|
item->next = mc->allowed_dynamic_sysbus_devices;
|
|
mc->allowed_dynamic_sysbus_devices = item;
|
|
}
|
|
|
|
static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
|
|
{
|
|
MachineState *machine = opaque;
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
bool allowed = false;
|
|
strList *wl;
|
|
|
|
for (wl = mc->allowed_dynamic_sysbus_devices;
|
|
!allowed && wl;
|
|
wl = wl->next) {
|
|
allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
|
|
}
|
|
|
|
if (!allowed) {
|
|
error_report("Option '-device %s' cannot be handled by this machine",
|
|
object_class_get_name(object_get_class(OBJECT(sbdev))));
|
|
exit(1);
|
|
}
|
|
}
|
|
|
|
static void machine_init_notify(Notifier *notifier, void *data)
|
|
{
|
|
MachineState *machine = MACHINE(qdev_get_machine());
|
|
|
|
/*
|
|
* Loop through all dynamically created sysbus devices and check if they are
|
|
* all allowed. If a device is not allowed, error out.
|
|
*/
|
|
foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
|
|
}
|
|
|
|
HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
|
|
{
|
|
int i;
|
|
HotpluggableCPUList *head = NULL;
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
|
|
/* force board to initialize possible_cpus if it hasn't been done yet */
|
|
mc->possible_cpu_arch_ids(machine);
|
|
|
|
for (i = 0; i < machine->possible_cpus->len; i++) {
|
|
Object *cpu;
|
|
HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
|
|
HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
|
|
|
|
cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
|
|
cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
|
|
cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
|
|
sizeof(*cpu_item->props));
|
|
|
|
cpu = machine->possible_cpus->cpus[i].cpu;
|
|
if (cpu) {
|
|
cpu_item->has_qom_path = true;
|
|
cpu_item->qom_path = object_get_canonical_path(cpu);
|
|
}
|
|
list_item->value = cpu_item;
|
|
list_item->next = head;
|
|
head = list_item;
|
|
}
|
|
return head;
|
|
}
|
|
|
|
/**
|
|
* machine_set_cpu_numa_node:
|
|
* @machine: machine object to modify
|
|
* @props: specifies which cpu objects to assign to
|
|
* numa node specified by @props.node_id
|
|
* @errp: if an error occurs, a pointer to an area to store the error
|
|
*
|
|
* Associate NUMA node specified by @props.node_id with cpu slots that
|
|
* match socket/core/thread-ids specified by @props. It's recommended to use
|
|
* query-hotpluggable-cpus.props values to specify affected cpu slots,
|
|
* which would lead to exact 1:1 mapping of cpu slots to NUMA node.
|
|
*
|
|
* However for CLI convenience it's possible to pass in subset of properties,
|
|
* which would affect all cpu slots that match it.
|
|
* Ex for pc machine:
|
|
* -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
|
|
* -numa cpu,node-id=0,socket_id=0 \
|
|
* -numa cpu,node-id=1,socket_id=1
|
|
* will assign all child cores of socket 0 to node 0 and
|
|
* of socket 1 to node 1.
|
|
*
|
|
* On attempt of reassigning (already assigned) cpu slot to another NUMA node,
|
|
* return error.
|
|
* Empty subset is disallowed and function will return with error in this case.
|
|
*/
|
|
void machine_set_cpu_numa_node(MachineState *machine,
|
|
const CpuInstanceProperties *props, Error **errp)
|
|
{
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
bool match = false;
|
|
int i;
|
|
|
|
if (!mc->possible_cpu_arch_ids) {
|
|
error_setg(errp, "mapping of CPUs to NUMA node is not supported");
|
|
return;
|
|
}
|
|
|
|
/* disabling node mapping is not supported, forbid it */
|
|
assert(props->has_node_id);
|
|
|
|
/* force board to initialize possible_cpus if it hasn't been done yet */
|
|
mc->possible_cpu_arch_ids(machine);
|
|
|
|
for (i = 0; i < machine->possible_cpus->len; i++) {
|
|
CPUArchId *slot = &machine->possible_cpus->cpus[i];
|
|
|
|
/* reject unsupported by board properties */
|
|
if (props->has_thread_id && !slot->props.has_thread_id) {
|
|
error_setg(errp, "thread-id is not supported");
|
|
return;
|
|
}
|
|
|
|
if (props->has_core_id && !slot->props.has_core_id) {
|
|
error_setg(errp, "core-id is not supported");
|
|
return;
|
|
}
|
|
|
|
if (props->has_socket_id && !slot->props.has_socket_id) {
|
|
error_setg(errp, "socket-id is not supported");
|
|
return;
|
|
}
|
|
|
|
/* skip slots with explicit mismatch */
|
|
if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
|
|
continue;
|
|
}
|
|
|
|
if (props->has_core_id && props->core_id != slot->props.core_id) {
|
|
continue;
|
|
}
|
|
|
|
if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
|
|
continue;
|
|
}
|
|
|
|
/* reject assignment if slot is already assigned, for compatibility
|
|
* of legacy cpu_index mapping with SPAPR core based mapping do not
|
|
* error out if cpu thread and matched core have the same node-id */
|
|
if (slot->props.has_node_id &&
|
|
slot->props.node_id != props->node_id) {
|
|
error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
|
|
slot->props.node_id);
|
|
return;
|
|
}
|
|
|
|
/* assign slot to node as it's matched '-numa cpu' key */
|
|
match = true;
|
|
slot->props.node_id = props->node_id;
|
|
slot->props.has_node_id = props->has_node_id;
|
|
}
|
|
|
|
if (!match) {
|
|
error_setg(errp, "no match found");
|
|
}
|
|
}
|
|
|
|
static void machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
/* Default 128 MB as guest ram size */
|
|
mc->default_ram_size = 128 * MiB;
|
|
mc->rom_file_has_mr = true;
|
|
|
|
/* numa node memory size aligned on 8MB by default.
|
|
* On Linux, each node's border has to be 8MB aligned
|
|
*/
|
|
mc->numa_mem_align_shift = 23;
|
|
mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
|
|
|
|
object_class_property_add_str(oc, "accel",
|
|
machine_get_accel, machine_set_accel, &error_abort);
|
|
object_class_property_set_description(oc, "accel",
|
|
"Accelerator list", &error_abort);
|
|
|
|
object_class_property_add(oc, "kernel-irqchip", "on|off|split",
|
|
NULL, machine_set_kernel_irqchip,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "kernel-irqchip",
|
|
"Configure KVM in-kernel irqchip", &error_abort);
|
|
|
|
object_class_property_add(oc, "kvm-shadow-mem", "int",
|
|
machine_get_kvm_shadow_mem, machine_set_kvm_shadow_mem,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "kvm-shadow-mem",
|
|
"KVM shadow MMU size", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "kernel",
|
|
machine_get_kernel, machine_set_kernel, &error_abort);
|
|
object_class_property_set_description(oc, "kernel",
|
|
"Linux kernel image file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "initrd",
|
|
machine_get_initrd, machine_set_initrd, &error_abort);
|
|
object_class_property_set_description(oc, "initrd",
|
|
"Linux initial ramdisk file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "append",
|
|
machine_get_append, machine_set_append, &error_abort);
|
|
object_class_property_set_description(oc, "append",
|
|
"Linux kernel command line", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dtb",
|
|
machine_get_dtb, machine_set_dtb, &error_abort);
|
|
object_class_property_set_description(oc, "dtb",
|
|
"Linux kernel device tree file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dumpdtb",
|
|
machine_get_dumpdtb, machine_set_dumpdtb, &error_abort);
|
|
object_class_property_set_description(oc, "dumpdtb",
|
|
"Dump current dtb to a file and quit", &error_abort);
|
|
|
|
object_class_property_add(oc, "phandle-start", "int",
|
|
machine_get_phandle_start, machine_set_phandle_start,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "phandle-start",
|
|
"The first phandle ID we may generate dynamically", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dt-compatible",
|
|
machine_get_dt_compatible, machine_set_dt_compatible, &error_abort);
|
|
object_class_property_set_description(oc, "dt-compatible",
|
|
"Overrides the \"compatible\" property of the dt root node",
|
|
&error_abort);
|
|
|
|
object_class_property_add_bool(oc, "dump-guest-core",
|
|
machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort);
|
|
object_class_property_set_description(oc, "dump-guest-core",
|
|
"Include guest memory in a core dump", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "mem-merge",
|
|
machine_get_mem_merge, machine_set_mem_merge, &error_abort);
|
|
object_class_property_set_description(oc, "mem-merge",
|
|
"Enable/disable memory merge support", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "usb",
|
|
machine_get_usb, machine_set_usb, &error_abort);
|
|
object_class_property_set_description(oc, "usb",
|
|
"Set on/off to enable/disable usb", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "graphics",
|
|
machine_get_graphics, machine_set_graphics, &error_abort);
|
|
object_class_property_set_description(oc, "graphics",
|
|
"Set on/off to enable/disable graphics emulation", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "igd-passthru",
|
|
machine_get_igd_gfx_passthru, machine_set_igd_gfx_passthru,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "igd-passthru",
|
|
"Set on/off to enable/disable igd passthrou", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "firmware",
|
|
machine_get_firmware, machine_set_firmware,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "firmware",
|
|
"Firmware image", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "suppress-vmdesc",
|
|
machine_get_suppress_vmdesc, machine_set_suppress_vmdesc,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "suppress-vmdesc",
|
|
"Set on to disable self-describing migration", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "enforce-config-section",
|
|
machine_get_enforce_config_section, machine_set_enforce_config_section,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "enforce-config-section",
|
|
"Set on to enforce configuration section migration", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "memory-encryption",
|
|
machine_get_memory_encryption, machine_set_memory_encryption,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "memory-encryption",
|
|
"Set memory encryption object to use", &error_abort);
|
|
}
|
|
|
|
static void machine_class_base_init(ObjectClass *oc, void *data)
|
|
{
|
|
if (!object_class_is_abstract(oc)) {
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
const char *cname = object_class_get_name(oc);
|
|
assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
|
|
mc->name = g_strndup(cname,
|
|
strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
|
|
mc->compat_props = g_ptr_array_new();
|
|
}
|
|
}
|
|
|
|
static void machine_initfn(Object *obj)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
MachineClass *mc = MACHINE_GET_CLASS(obj);
|
|
|
|
ms->kernel_irqchip_allowed = true;
|
|
ms->kernel_irqchip_split = mc->default_kernel_irqchip_split;
|
|
ms->kvm_shadow_mem = -1;
|
|
ms->dump_guest_core = true;
|
|
ms->mem_merge = true;
|
|
ms->enable_graphics = true;
|
|
|
|
if (mc->nvdimm_supported) {
|
|
Object *obj = OBJECT(ms);
|
|
|
|
ms->nvdimms_state = g_new0(NVDIMMState, 1);
|
|
object_property_add_bool(obj, "nvdimm",
|
|
machine_get_nvdimm, machine_set_nvdimm,
|
|
&error_abort);
|
|
object_property_set_description(obj, "nvdimm",
|
|
"Set on/off to enable/disable "
|
|
"NVDIMM instantiation", NULL);
|
|
|
|
object_property_add_str(obj, "nvdimm-persistence",
|
|
machine_get_nvdimm_persistence,
|
|
machine_set_nvdimm_persistence,
|
|
&error_abort);
|
|
object_property_set_description(obj, "nvdimm-persistence",
|
|
"Set NVDIMM persistence"
|
|
"Valid values are cpu, mem-ctrl",
|
|
NULL);
|
|
}
|
|
|
|
|
|
/* Register notifier when init is done for sysbus sanity checks */
|
|
ms->sysbus_notifier.notify = machine_init_notify;
|
|
qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
|
|
}
|
|
|
|
static void machine_finalize(Object *obj)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
g_free(ms->accel);
|
|
g_free(ms->kernel_filename);
|
|
g_free(ms->initrd_filename);
|
|
g_free(ms->kernel_cmdline);
|
|
g_free(ms->dtb);
|
|
g_free(ms->dumpdtb);
|
|
g_free(ms->dt_compatible);
|
|
g_free(ms->firmware);
|
|
g_free(ms->device_memory);
|
|
g_free(ms->nvdimms_state);
|
|
}
|
|
|
|
bool machine_usb(MachineState *machine)
|
|
{
|
|
return machine->usb;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_allowed(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_allowed;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_required(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_required;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_split(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_split;
|
|
}
|
|
|
|
int machine_kvm_shadow_mem(MachineState *machine)
|
|
{
|
|
return machine->kvm_shadow_mem;
|
|
}
|
|
|
|
int machine_phandle_start(MachineState *machine)
|
|
{
|
|
return machine->phandle_start;
|
|
}
|
|
|
|
bool machine_dump_guest_core(MachineState *machine)
|
|
{
|
|
return machine->dump_guest_core;
|
|
}
|
|
|
|
bool machine_mem_merge(MachineState *machine)
|
|
{
|
|
return machine->mem_merge;
|
|
}
|
|
|
|
static char *cpu_slot_to_string(const CPUArchId *cpu)
|
|
{
|
|
GString *s = g_string_new(NULL);
|
|
if (cpu->props.has_socket_id) {
|
|
g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
|
|
}
|
|
if (cpu->props.has_core_id) {
|
|
if (s->len) {
|
|
g_string_append_printf(s, ", ");
|
|
}
|
|
g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
|
|
}
|
|
if (cpu->props.has_thread_id) {
|
|
if (s->len) {
|
|
g_string_append_printf(s, ", ");
|
|
}
|
|
g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
|
|
}
|
|
return g_string_free(s, false);
|
|
}
|
|
|
|
static void machine_numa_finish_cpu_init(MachineState *machine)
|
|
{
|
|
int i;
|
|
bool default_mapping;
|
|
GString *s = g_string_new(NULL);
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
|
|
|
|
assert(nb_numa_nodes);
|
|
for (i = 0; i < possible_cpus->len; i++) {
|
|
if (possible_cpus->cpus[i].props.has_node_id) {
|
|
break;
|
|
}
|
|
}
|
|
default_mapping = (i == possible_cpus->len);
|
|
|
|
for (i = 0; i < possible_cpus->len; i++) {
|
|
const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
|
|
|
|
if (!cpu_slot->props.has_node_id) {
|
|
/* fetch default mapping from board and enable it */
|
|
CpuInstanceProperties props = cpu_slot->props;
|
|
|
|
props.node_id = mc->get_default_cpu_node_id(machine, i);
|
|
if (!default_mapping) {
|
|
/* record slots with not set mapping,
|
|
* TODO: make it hard error in future */
|
|
char *cpu_str = cpu_slot_to_string(cpu_slot);
|
|
g_string_append_printf(s, "%sCPU %d [%s]",
|
|
s->len ? ", " : "", i, cpu_str);
|
|
g_free(cpu_str);
|
|
|
|
/* non mapped cpus used to fallback to node 0 */
|
|
props.node_id = 0;
|
|
}
|
|
|
|
props.has_node_id = true;
|
|
machine_set_cpu_numa_node(machine, &props, &error_fatal);
|
|
}
|
|
}
|
|
if (s->len && !qtest_enabled()) {
|
|
warn_report("CPU(s) not present in any NUMA nodes: %s",
|
|
s->str);
|
|
warn_report("All CPU(s) up to maxcpus should be described "
|
|
"in NUMA config, ability to start up with partial NUMA "
|
|
"mappings is obsoleted and will be removed in future");
|
|
}
|
|
g_string_free(s, true);
|
|
}
|
|
|
|
void machine_run_board_init(MachineState *machine)
|
|
{
|
|
MachineClass *machine_class = MACHINE_GET_CLASS(machine);
|
|
|
|
numa_complete_configuration(machine);
|
|
if (nb_numa_nodes) {
|
|
machine_numa_finish_cpu_init(machine);
|
|
}
|
|
|
|
/* If the machine supports the valid_cpu_types check and the user
|
|
* specified a CPU with -cpu check here that the user CPU is supported.
|
|
*/
|
|
if (machine_class->valid_cpu_types && machine->cpu_type) {
|
|
ObjectClass *class = object_class_by_name(machine->cpu_type);
|
|
int i;
|
|
|
|
for (i = 0; machine_class->valid_cpu_types[i]; i++) {
|
|
if (object_class_dynamic_cast(class,
|
|
machine_class->valid_cpu_types[i])) {
|
|
/* The user specificed CPU is in the valid field, we are
|
|
* good to go.
|
|
*/
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!machine_class->valid_cpu_types[i]) {
|
|
/* The user specified CPU is not valid */
|
|
error_report("Invalid CPU type: %s", machine->cpu_type);
|
|
error_printf("The valid types are: %s",
|
|
machine_class->valid_cpu_types[0]);
|
|
for (i = 1; machine_class->valid_cpu_types[i]; i++) {
|
|
error_printf(", %s", machine_class->valid_cpu_types[i]);
|
|
}
|
|
error_printf("\n");
|
|
|
|
exit(1);
|
|
}
|
|
}
|
|
|
|
machine_class->init(machine);
|
|
}
|
|
|
|
static const TypeInfo machine_info = {
|
|
.name = TYPE_MACHINE,
|
|
.parent = TYPE_OBJECT,
|
|
.abstract = true,
|
|
.class_size = sizeof(MachineClass),
|
|
.class_init = machine_class_init,
|
|
.class_base_init = machine_class_base_init,
|
|
.instance_size = sizeof(MachineState),
|
|
.instance_init = machine_initfn,
|
|
.instance_finalize = machine_finalize,
|
|
};
|
|
|
|
static void machine_register_types(void)
|
|
{
|
|
type_register_static(&machine_info);
|
|
}
|
|
|
|
type_init(machine_register_types)
|