qemu/hw/adc
Andrew Jeffery 5857974d5d hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests
such as device initialisation and read out of dummy sample values. The
sample value generation strategy is similar to the STM ADC already in
the tree.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
[clg : support for multiple engines (AST2600) ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[pdel : refactored engine register struct fields to regs[] array field]
[pdel : added guest-error checking for upper-8 channel regs in AST2600]
[pdel : allow 16-bit reads of the channel data registers]
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Message-Id: <20211005052604.1674891-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
..
aspeed_adc.c hw/adc: Add basic Aspeed ADC model 2021-10-12 08:20:08 +02:00
Kconfig adc: Move the max111x driver to the adc directory 2021-06-17 07:10:32 -05:00
max111x.c adc: Move the max111x driver to the adc directory 2021-06-17 07:10:32 -05:00
meson.build hw/adc: Add basic Aspeed ADC model 2021-10-12 08:20:08 +02:00
npcm7xx_adc.c clock: Add ClockEvent parameter to callbacks 2021-03-08 17:20:01 +00:00
stm32f2xx_adc.c
trace-events hw/adc: Add basic Aspeed ADC model 2021-10-12 08:20:08 +02:00
trace.h hw/adc: Add an ADC module for NPCM7XX 2021-01-12 21:19:02 +00:00
zynq-xadc.c adc: Move the zynq-xadc file to the adc directories 2021-06-17 07:10:32 -05:00