79d29a9d06
PCI device I/O must be >= 8 bytes in length or they don't work. Allow the size to be passed in, the default size of 2 or 3 won't work. Signed-off-by: Corey Minyard <cminyard@mvista.com>
269 lines
8.1 KiB
C
269 lines
8.1 KiB
C
/*
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* IPMI base class
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*
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* Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_IPMI_H
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#define HW_IPMI_H
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#include "exec/memory.h"
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#include "hw/qdev-core.h"
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#define MAX_IPMI_MSG_SIZE 300
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enum ipmi_op {
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IPMI_RESET_CHASSIS,
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IPMI_POWEROFF_CHASSIS,
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IPMI_POWERON_CHASSIS,
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IPMI_POWERCYCLE_CHASSIS,
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IPMI_PULSE_DIAG_IRQ,
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IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP,
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IPMI_SEND_NMI
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};
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#define IPMI_CC_INVALID_CMD 0xc1
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#define IPMI_CC_COMMAND_INVALID_FOR_LUN 0xc2
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#define IPMI_CC_TIMEOUT 0xc3
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#define IPMI_CC_OUT_OF_SPACE 0xc4
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#define IPMI_CC_INVALID_RESERVATION 0xc5
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#define IPMI_CC_REQUEST_DATA_TRUNCATED 0xc6
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#define IPMI_CC_REQUEST_DATA_LENGTH_INVALID 0xc7
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#define IPMI_CC_PARM_OUT_OF_RANGE 0xc9
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#define IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES 0xca
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#define IPMI_CC_REQ_ENTRY_NOT_PRESENT 0xcb
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#define IPMI_CC_INVALID_DATA_FIELD 0xcc
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#define IPMI_CC_BMC_INIT_IN_PROGRESS 0xd2
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#define IPMI_CC_COMMAND_NOT_SUPPORTED 0xd5
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#define IPMI_NETFN_APP 0x06
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#define IPMI_DEBUG 1
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/* Specified in the SMBIOS spec. */
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#define IPMI_SMBIOS_KCS 0x01
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#define IPMI_SMBIOS_SMIC 0x02
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#define IPMI_SMBIOS_BT 0x03
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#define IPMI_SMBIOS_SSIF 0x04
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/*
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* Used for transferring information to interfaces that add
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* entries to firmware tables.
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*/
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typedef struct IPMIFwInfo {
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const char *interface_name;
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int interface_type;
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uint8_t ipmi_spec_major_revision;
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uint8_t ipmi_spec_minor_revision;
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uint8_t i2c_slave_address;
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uint32_t uuid;
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uint64_t base_address;
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uint64_t register_length;
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uint8_t register_spacing;
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enum {
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IPMI_MEMSPACE_IO,
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IPMI_MEMSPACE_MEM32,
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IPMI_MEMSPACE_MEM64,
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IPMI_MEMSPACE_SMBUS
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} memspace;
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int interrupt_number;
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enum {
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IPMI_LEVEL_IRQ,
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IPMI_EDGE_IRQ
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} irq_type;
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} IPMIFwInfo;
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/*
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* Called by each instantiated IPMI interface device to get it's uuid.
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*/
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uint32_t ipmi_next_uuid(void);
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/* IPMI Interface types (KCS, SMIC, BT) are prefixed with this */
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#define TYPE_IPMI_INTERFACE_PREFIX "ipmi-interface-"
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/*
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* An IPMI Interface, the interface for talking between the target
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* and the BMC.
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*/
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#define TYPE_IPMI_INTERFACE "ipmi-interface"
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#define IPMI_INTERFACE(obj) \
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INTERFACE_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE)
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#define IPMI_INTERFACE_CLASS(class) \
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OBJECT_CLASS_CHECK(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE)
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#define IPMI_INTERFACE_GET_CLASS(class) \
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OBJECT_GET_CLASS(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE)
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typedef struct IPMIInterface IPMIInterface;
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typedef struct IPMIInterfaceClass {
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InterfaceClass parent;
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/*
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* min_size is the requested I/O size and must be a power of 2.
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* This is so PCI (or other busses) can request a bigger range.
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* Use 0 for the default.
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*/
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void (*init)(struct IPMIInterface *s, unsigned int min_size, Error **errp);
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/*
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* Perform various operations on the hardware. If checkonly is
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* true, it will return if the operation can be performed, but it
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* will not do the operation.
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*/
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int (*do_hw_op)(struct IPMIInterface *s, enum ipmi_op op, int checkonly);
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/*
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* Enable/disable irqs on the interface when the BMC requests this.
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*/
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void (*set_irq_enable)(struct IPMIInterface *s, int val);
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/*
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* Handle an event that occurred on the interface, generally the.
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* target writing to a register.
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*/
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void (*handle_if_event)(struct IPMIInterface *s);
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/*
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* The interfaces use this to perform certain ops
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*/
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void (*set_atn)(struct IPMIInterface *s, int val, int irq);
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/*
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* Got an IPMI warm/cold reset.
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*/
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void (*reset)(struct IPMIInterface *s, bool is_cold);
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/*
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* Handle a response from the bmc.
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*/
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void (*handle_rsp)(struct IPMIInterface *s, uint8_t msg_id,
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unsigned char *rsp, unsigned int rsp_len);
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/*
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* Set by the owner to hold the backend data for the interface.
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*/
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void *(*get_backend_data)(struct IPMIInterface *s);
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/*
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* Return the firmware info for a device.
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*/
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void (*get_fwinfo)(struct IPMIInterface *s, IPMIFwInfo *info);
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} IPMIInterfaceClass;
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/*
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* Define a BMC simulator (or perhaps a connection to a real BMC)
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*/
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#define TYPE_IPMI_BMC "ipmi-bmc"
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#define IPMI_BMC(obj) \
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OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC)
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#define IPMI_BMC_CLASS(obj_class) \
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OBJECT_CLASS_CHECK(IPMIBmcClass, (obj_class), TYPE_IPMI_BMC)
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#define IPMI_BMC_GET_CLASS(obj) \
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OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC)
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typedef struct IPMIBmc {
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DeviceState parent;
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uint8_t slave_addr;
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IPMIInterface *intf;
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} IPMIBmc;
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typedef struct IPMIBmcClass {
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DeviceClass parent;
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/* Called when the system resets to report to the bmc. */
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void (*handle_reset)(struct IPMIBmc *s);
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/*
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* Handle a command to the bmc.
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*/
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void (*handle_command)(struct IPMIBmc *s,
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uint8_t *cmd, unsigned int cmd_len,
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unsigned int max_cmd_len,
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uint8_t msg_id);
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} IPMIBmcClass;
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/*
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* Add a link property to obj that points to a BMC.
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*/
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void ipmi_bmc_find_and_link(Object *obj, Object **bmc);
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#ifdef IPMI_DEBUG
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#define ipmi_debug(fs, ...) \
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fprintf(stderr, "IPMI (%s): " fs, __func__, ##__VA_ARGS__)
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#else
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#define ipmi_debug(fs, ...)
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#endif
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struct ipmi_sdr_header {
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uint8_t rec_id[2];
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uint8_t sdr_version; /* 0x51 */
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uint8_t rec_type;
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uint8_t rec_length;
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};
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#define IPMI_SDR_HEADER_SIZE sizeof(struct ipmi_sdr_header)
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#define ipmi_sdr_recid(sdr) ((sdr)->rec_id[0] | ((sdr)->rec_id[1] << 8))
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#define ipmi_sdr_length(sdr) ((sdr)->rec_length + IPMI_SDR_HEADER_SIZE)
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/*
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* 43.2 SDR Type 02h. Compact Sensor Record
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*/
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#define IPMI_SDR_COMPACT_TYPE 2
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struct ipmi_sdr_compact {
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struct ipmi_sdr_header header;
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uint8_t sensor_owner_id;
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uint8_t sensor_owner_lun;
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uint8_t sensor_owner_number; /* byte 8 */
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uint8_t entity_id;
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uint8_t entity_instance;
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uint8_t sensor_init;
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uint8_t sensor_caps;
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uint8_t sensor_type;
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uint8_t reading_type;
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uint8_t assert_mask[2]; /* byte 16 */
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uint8_t deassert_mask[2];
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uint8_t discrete_mask[2];
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uint8_t sensor_unit1;
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uint8_t sensor_unit2;
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uint8_t sensor_unit3;
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uint8_t sensor_direction[2]; /* byte 24 */
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uint8_t positive_threshold;
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uint8_t negative_threshold;
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uint8_t reserved[3];
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uint8_t oem;
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uint8_t id_str_len; /* byte 32 */
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uint8_t id_string[16];
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};
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typedef uint8_t ipmi_sdr_compact_buffer[sizeof(struct ipmi_sdr_compact)];
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int ipmi_bmc_sdr_find(IPMIBmc *b, uint16_t recid,
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const struct ipmi_sdr_compact **sdr, uint16_t *nextrec);
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void ipmi_bmc_gen_event(IPMIBmc *b, uint8_t *evt, bool log);
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#endif
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