Richard Henderson 466d375960 tcg: Handle dh_typecode_i128 with TCG_CALL_{RET,ARG}_NORMAL ...

Many hosts pass and return 128-bit quantities like sequential
64-bit quantities.  Treat this just like we currently break
down 64-bit quantities for a 32-bit host.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

2023-02-04 06:19:42 -10:00

..

aarch64

tcg/aarch64: Reorg goto_tb implementation

2023-01-17 10:36:02 -10:00

arm

tcg/arm: Use register pair allocation for qemu_{ld,st}_i64

2023-01-23 14:39:48 -10:00

i386

tcg: Remove TCG_TARGET_HAS_direct_jump

2023-01-17 10:25:49 -10:00

loongarch64

tcg/loongarch64: Reorg goto_tb implementation

2023-01-23 16:00:13 -10:00

mips

tcg: Remove TCG_TARGET_HAS_direct_jump

2023-01-17 10:25:49 -10:00

ppc

tcg/ppc: Reorg goto_tb implementation

2023-01-17 10:36:16 -10:00

riscv

tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst

2023-01-20 10:14:14 +10:00

s390x

tcg: Remove TCG_TARGET_HAS_direct_jump

2023-01-17 10:25:49 -10:00

sparc64

tcg/sparc64: Reorg goto_tb implementation

2023-01-17 10:38:18 -10:00

tci

tcg: Remove TCG_TARGET_HAS_direct_jump

2023-01-17 10:25:49 -10:00

meson.build

…

optimize.c

tcg: Reorg function calls

2023-01-05 11:41:29 -08:00

region.c

tcg: Fix returned type in alloc_code_gen_buffer_splitwx_memfd()

2022-07-12 10:30:10 +05:30

tcg-common.c

…

tcg-internal.h

tcg: Move ffi_cif pointer into TCGHelperInfo

2023-01-05 11:41:29 -08:00

tcg-ldst.c.inc

tcg: Rename TCGMemOpIdx to MemOpIdx

2021-10-05 16:53:17 -07:00

tcg-op-gvec.c

tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i

2022-03-02 06:51:38 +01:00

tcg-op-vec.c

tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()

2023-01-05 11:41:29 -08:00

tcg-op.c

tcg: Avoid recursion in tcg_gen_mulu2_i32

2023-01-23 14:39:48 -10:00

tcg-pool.c.inc

…

tcg.c

tcg: Handle dh_typecode_i128 with TCG_CALL_{RET,ARG}_NORMAL

2023-02-04 06:19:42 -10:00

tci.c

tci: MAX_OPC_PARAM_IARGS is no longer used

2023-01-04 16:20:01 -08:00