qemu/target
Xiaojuan Yang 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field
By the manual of LoongArch CSR, the VS field(18:16 bits) of
ECFG reg means that the number of instructions between each
exception entry is 2^VS.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04 11:08:58 +05:30
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
avr target/avr: Drop avr_cpu_memory_rw_debug() 2022-06-20 13:11:36 -07:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
loongarch target/loongarch: Fix the meaning of ECFG reg's VS field 2022-07-04 11:08:58 +05:30
m68k target/m68k: Make semihosting system only 2022-06-28 10:13:22 +05:30
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips target/mips: Drop pread and pwrite syscalls from semihosting 2022-06-28 10:15:12 +05:30
nios2 target/nios2: Move nios2-semi.c to nios2_softmmu_ss 2022-06-28 10:18:57 +05:30
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc target/ppc: cpu_init: Clean up stop state on cpu reset 2022-06-20 08:38:59 -03:00
riscv target/riscv: Update default priority table for local interrupts 2022-07-03 10:03:20 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00