4d6e3ac5d4
As KVM now makes use of exception_index to keep pending exceptions, we have to save&restore this field as well. NOTE: We have to nail the arch-independent exception_index down to a certain bit width for proper vmstate processing, namely to 32 bit. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
478 lines
13 KiB
C
478 lines
13 KiB
C
#include "hw/hw.h"
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#include "hw/boards.h"
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#include "hw/pc.h"
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#include "hw/isa.h"
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#include "exec-all.h"
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#include "kvm.h"
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static const VMStateDescription vmstate_segment = {
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.name = "segment",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(selector, SegmentCache),
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VMSTATE_UINTTL(base, SegmentCache),
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VMSTATE_UINT32(limit, SegmentCache),
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VMSTATE_UINT32(flags, SegmentCache),
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VMSTATE_END_OF_LIST()
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}
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};
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#define VMSTATE_SEGMENT(_field, _state) { \
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.name = (stringify(_field)), \
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.size = sizeof(SegmentCache), \
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.vmsd = &vmstate_segment, \
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.flags = VMS_STRUCT, \
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.offset = offsetof(_state, _field) \
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+ type_check(SegmentCache,typeof_field(_state, _field)) \
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}
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#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
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static const VMStateDescription vmstate_xmm_reg = {
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.name = "xmm_reg",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
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VMSTATE_END_OF_LIST()
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}
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};
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#define VMSTATE_XMM_REGS(_field, _state, _n) \
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
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static const VMStateDescription vmstate_mtrr_var = {
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.name = "mtrr_var",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(base, MTRRVar),
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VMSTATE_UINT64(mask, MTRRVar),
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VMSTATE_END_OF_LIST()
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}
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};
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#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
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static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
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{
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fprintf(stderr, "call put_fpreg() with invalid arguments\n");
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exit(0);
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}
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#ifdef USE_X86LDOUBLE
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/* XXX: add that in a FPU generic layer */
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union x86_longdouble {
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uint64_t mant;
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uint16_t exp;
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};
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#define MANTD1(fp) (fp & ((1LL << 52) - 1))
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#define EXPBIAS1 1023
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#define EXPD1(fp) ((fp >> 52) & 0x7FF)
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#define SIGND1(fp) ((fp >> 32) & 0x80000000)
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static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
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{
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int e;
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/* mantissa */
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p->mant = (MANTD1(temp) << 11) | (1LL << 63);
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/* exponent + sign */
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e = EXPD1(temp) - EXPBIAS1 + 16383;
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e |= SIGND1(temp) >> 16;
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p->exp = e;
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}
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static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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uint64_t mant;
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uint16_t exp;
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qemu_get_be64s(f, &mant);
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qemu_get_be16s(f, &exp);
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fp_reg->d = cpu_set_fp80(mant, exp);
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return 0;
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}
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static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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uint64_t mant;
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uint16_t exp;
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/* we save the real CPU data (in case of MMX usage only 'mant'
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contains the MMX register */
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cpu_get_fp80(&mant, &exp, fp_reg->d);
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qemu_put_be64s(f, &mant);
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qemu_put_be16s(f, &exp);
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}
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static const VMStateInfo vmstate_fpreg = {
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.name = "fpreg",
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.get = get_fpreg,
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.put = put_fpreg,
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};
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static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
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{
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union x86_longdouble *p = opaque;
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uint64_t mant;
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qemu_get_be64s(f, &mant);
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p->mant = mant;
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p->exp = 0xffff;
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return 0;
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}
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static const VMStateInfo vmstate_fpreg_1_mmx = {
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.name = "fpreg_1_mmx",
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.get = get_fpreg_1_mmx,
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.put = put_fpreg_error,
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};
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static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
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{
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union x86_longdouble *p = opaque;
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uint64_t mant;
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qemu_get_be64s(f, &mant);
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fp64_to_fp80(p, mant);
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return 0;
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}
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static const VMStateInfo vmstate_fpreg_1_no_mmx = {
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.name = "fpreg_1_no_mmx",
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.get = get_fpreg_1_no_mmx,
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.put = put_fpreg_error,
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};
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static bool fpregs_is_0(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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return (env->fpregs_format_vmstate == 0);
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}
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static bool fpregs_is_1_mmx(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int guess_mmx;
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
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(env->fpus_vmstate & 0x3800) == 0);
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return (guess_mmx && (env->fpregs_format_vmstate == 1));
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}
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static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int guess_mmx;
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
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(env->fpus_vmstate & 0x3800) == 0);
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return (!guess_mmx && (env->fpregs_format_vmstate == 1));
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}
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#define VMSTATE_FP_REGS(_field, _state, _n) \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
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#else
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static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
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return 0;
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}
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static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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/* if we use doubles for float emulation, we save the doubles to
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avoid losing information in case of MMX usage. It can give
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problems if the image is restored on a CPU where long
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doubles are used instead. */
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qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
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}
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const VMStateInfo vmstate_fpreg = {
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.name = "fpreg",
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.get = get_fpreg,
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.put = put_fpreg,
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};
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static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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uint64_t mant;
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uint16_t exp;
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qemu_get_be64s(f, &mant);
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qemu_get_be16s(f, &exp);
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fp_reg->mmx.MMX_Q(0) = mant;
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return 0;
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}
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const VMStateInfo vmstate_fpreg_0_mmx = {
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.name = "fpreg_0_mmx",
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.get = get_fpreg_0_mmx,
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.put = put_fpreg_error,
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};
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static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)
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{
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FPReg *fp_reg = opaque;
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uint64_t mant;
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uint16_t exp;
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qemu_get_be64s(f, &mant);
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qemu_get_be16s(f, &exp);
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fp_reg->d = cpu_set_fp80(mant, exp);
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return 0;
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}
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const VMStateInfo vmstate_fpreg_0_no_mmx = {
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.name = "fpreg_0_no_mmx",
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.get = get_fpreg_0_no_mmx,
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.put = put_fpreg_error,
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};
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static bool fpregs_is_1(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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return env->fpregs_format_vmstate == 1;
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}
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static bool fpregs_is_0_mmx(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int guess_mmx;
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
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(env->fpus_vmstate & 0x3800) == 0);
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return guess_mmx && env->fpregs_format_vmstate == 0;
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}
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static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int guess_mmx;
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
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(env->fpus_vmstate & 0x3800) == 0);
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return !guess_mmx && env->fpregs_format_vmstate == 0;
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}
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#define VMSTATE_FP_REGS(_field, _state, _n) \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)
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#endif /* USE_X86LDOUBLE */
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static bool version_is_5(void *opaque, int version_id)
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{
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return version_id == 5;
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}
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#ifdef TARGET_X86_64
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static bool less_than_7(void *opaque, int version_id)
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{
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return version_id < 7;
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}
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static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
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{
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uint64_t *v = pv;
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*v = qemu_get_be32(f);
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return 0;
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}
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static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
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{
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uint64_t *v = pv;
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qemu_put_be32(f, *v);
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}
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static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
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.name = "uint64_as_uint32",
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.get = get_uint64_as_uint32,
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.put = put_uint64_as_uint32,
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};
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#define VMSTATE_HACK_UINT32(_f, _s, _t) \
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VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
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#endif
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static void cpu_pre_save(void *opaque)
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{
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CPUState *env = opaque;
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int i;
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cpu_synchronize_state(env);
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/* FPU */
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env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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env->fptag_vmstate = 0;
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for(i = 0; i < 8; i++) {
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env->fptag_vmstate |= ((!env->fptags[i]) << i);
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}
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#ifdef USE_X86LDOUBLE
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env->fpregs_format_vmstate = 0;
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#else
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env->fpregs_format_vmstate = 1;
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#endif
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}
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static int cpu_pre_load(void *opaque)
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{
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CPUState *env = opaque;
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cpu_synchronize_state(env);
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return 0;
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}
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static int cpu_post_load(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int i;
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/* XXX: restore FPU round state */
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env->fpstt = (env->fpus_vmstate >> 11) & 7;
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env->fpus = env->fpus_vmstate & ~0x3800;
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env->fptag_vmstate ^= 0xff;
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for(i = 0; i < 8; i++) {
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env->fptags[i] = (env->fptag_vmstate >> i) & 1;
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}
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cpu_breakpoint_remove_all(env, BP_CPU);
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cpu_watchpoint_remove_all(env, BP_CPU);
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for (i = 0; i < 4; i++)
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hw_breakpoint_insert(env, i);
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tlb_flush(env, 1);
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return 0;
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}
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static const VMStateDescription vmstate_cpu = {
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.name = "cpu",
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.version_id = CPU_SAVE_VERSION,
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.minimum_version_id = 3,
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.minimum_version_id_old = 3,
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.pre_save = cpu_pre_save,
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.pre_load = cpu_pre_load,
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.post_load = cpu_post_load,
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.fields = (VMStateField []) {
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VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
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VMSTATE_UINTTL(eip, CPUState),
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VMSTATE_UINTTL(eflags, CPUState),
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VMSTATE_UINT32(hflags, CPUState),
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/* FPU */
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VMSTATE_UINT16(fpuc, CPUState),
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VMSTATE_UINT16(fpus_vmstate, CPUState),
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VMSTATE_UINT16(fptag_vmstate, CPUState),
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VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
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VMSTATE_FP_REGS(fpregs, CPUState, 8),
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VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
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VMSTATE_SEGMENT(ldt, CPUState),
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VMSTATE_SEGMENT(tr, CPUState),
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VMSTATE_SEGMENT(gdt, CPUState),
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VMSTATE_SEGMENT(idt, CPUState),
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VMSTATE_UINT32(sysenter_cs, CPUState),
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#ifdef TARGET_X86_64
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/* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
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VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
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VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
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VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
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VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
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#else
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VMSTATE_UINTTL(sysenter_esp, CPUState),
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VMSTATE_UINTTL(sysenter_eip, CPUState),
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#endif
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VMSTATE_UINTTL(cr[0], CPUState),
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VMSTATE_UINTTL(cr[2], CPUState),
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VMSTATE_UINTTL(cr[3], CPUState),
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VMSTATE_UINTTL(cr[4], CPUState),
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VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
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/* MMU */
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VMSTATE_INT32(a20_mask, CPUState),
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/* XMM */
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VMSTATE_UINT32(mxcsr, CPUState),
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VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
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#ifdef TARGET_X86_64
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VMSTATE_UINT64(efer, CPUState),
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VMSTATE_UINT64(star, CPUState),
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VMSTATE_UINT64(lstar, CPUState),
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VMSTATE_UINT64(cstar, CPUState),
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VMSTATE_UINT64(fmask, CPUState),
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VMSTATE_UINT64(kernelgsbase, CPUState),
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#endif
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VMSTATE_UINT32_V(smbase, CPUState, 4),
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VMSTATE_UINT64_V(pat, CPUState, 5),
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VMSTATE_UINT32_V(hflags2, CPUState, 5),
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VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
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VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
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VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
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VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
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VMSTATE_UINT64_V(intercept, CPUState, 5),
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VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
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VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
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VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
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VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
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VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
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VMSTATE_UINT8_V(v_tpr, CPUState, 5),
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/* MTRRs */
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VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
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VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
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VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
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/* KVM-related states */
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VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
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VMSTATE_UINT32_V(mp_state, CPUState, 9),
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VMSTATE_UINT64_V(tsc, CPUState, 9),
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VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
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VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
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VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
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VMSTATE_UINT8_V(has_error_code, CPUState, 11),
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VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
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VMSTATE_INT32_V(exception_index, CPUState, 11),
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/* MCE */
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VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
|
|
VMSTATE_UINT64_V(mcg_status, CPUState, 10),
|
|
VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
|
|
VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
|
|
/* rdtscp */
|
|
VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
|
|
VMSTATE_END_OF_LIST()
|
|
/* The above list is not sorted /wrt version numbers, watch out! */
|
|
}
|
|
};
|
|
|
|
void cpu_save(QEMUFile *f, void *opaque)
|
|
{
|
|
vmstate_save_state(f, &vmstate_cpu, opaque);
|
|
}
|
|
|
|
int cpu_load(QEMUFile *f, void *opaque, int version_id)
|
|
{
|
|
return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
|
|
}
|