Peter Maydell 7c1840b686 target-arm: Make IRQ and FIQ gpio lines on the CPU object ...

Now that ARMCPU is a subclass of DeviceState, we can make the
CPU's inbound IRQ and FIQ lines be simply gpio lines, which
means we can remove the odd arm_pic shim.

We retain the arm_pic_init_cpu() function as a backwards
compatibility shim layer so we can convert the board models
to get the IRQ and FIQ lines directly from the ARMCPU
object one at a time.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-2-git-send-email-peter.maydell@linaro.org

2013-08-20 14:54:28 +01:00

..

arm-semi.c

exec: Change cpu_memory_rw_debug() argument to CPUState

2013-07-23 02:41:33 +02:00

cpu-qom.h

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

cpu.c

target-arm: Make IRQ and FIQ gpio lines on the CPU object

2013-08-20 14:54:28 +01:00

cpu.h

target-arm: Make IRQ and FIQ gpio lines on the CPU object

2013-08-20 14:54:28 +01:00

gdbstub.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

helper.c

target-arm: Implement 'int' loglevel

2013-08-20 14:54:28 +01:00

helper.h

…

iwmmxt_helper.c

…

kvm_arm.h

…

kvm-stub.c

…

kvm.c

memory: add ref/unref calls

2013-07-04 17:42:45 +02:00

machine.c

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Makefile.objs

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

neon_helper.c

…

op_addsub.h

…

op_helper.c

…

translate.c

cpu: Move singlestep_enabled field from CPU_COMMON to CPUState

2013-07-23 02:41:32 +02:00