Bastian Koppelmann 436d63ff3e target-tricore: Fix MFCR/MTCR insn and B format offset. ... Fix gen_mtcr using wrong register. Fix gen_mtcr/mfcr using sign extended offsets. Fix B format insn using not sign extendend offsets. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>		2014-12-21 18:35:38 +00:00
..
cpu-qom.h	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
cpu.c	target-tricore: Make TRICORE_FEATURES implying others.	2014-12-10 11:13:45 +00:00
cpu.h	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
csfr.def	target-tricore: Add instructions of RLC opcode format	2014-12-10 11:13:45 +00:00
helper.c	target-tricore: Remove the dummy interrupt boilerplate	2014-09-25 18:54:22 +01:00
helper.h	target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opcode	2014-12-21 18:35:16 +00:00
Makefile.objs
op_helper.c	target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opcode	2014-12-21 18:35:16 +00:00
translate.c	target-tricore: Fix MFCR/MTCR insn and B format offset.	2014-12-21 18:35:38 +00:00
tricore-defs.h
tricore-opcodes.h	target-tricore: Fix MFCR/MTCR insn and B format offset.	2014-12-21 18:35:38 +00:00