f2bc7e7fa1
Rearrange interrupt handling to match other targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
46 lines
961 B
C
46 lines
961 B
C
#ifndef EXEC_SPARC_H
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#define EXEC_SPARC_H 1
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#include "config.h"
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#include "dyngen-exec.h"
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register struct CPUSPARCState *env asm(AREG0);
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#define REGWPTR env->regwptr
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#define FT0 (env->ft0)
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#define FT1 (env->ft1)
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#define DT0 (env->dt0)
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#define DT1 (env->dt1)
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#define QT0 (env->qt0)
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#define QT1 (env->qt1)
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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#if defined(reg_REGWPTR)
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REGWPTR = env->regbase + (env->cwp * 16);
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env->regwptr = REGWPTR;
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#endif
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}
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static inline void regs_to_env(void)
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{
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}
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int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
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int mmu_idx, int is_softmmu);
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void do_interrupt(CPUState *env);
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static inline int cpu_halted(CPUState *env1) {
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if (!env1->halted)
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return 0;
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if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) {
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env1->halted = 0;
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return 0;
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}
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return EXCP_HALTED;
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}
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#endif
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