Leon Alrae 4267d3e6e0 target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6 ...

Also consider OPC_SPIM instruction as deleted in R6 because it is overlaping
with MIPS32R6 SDBBP.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

2014-10-13 12:38:25 +01:00

..

cpu-qom.h

target-mips: Use cpu_exec_interrupt qom hook

2014-09-25 18:54:22 +01:00

cpu.c

gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag

2014-10-06 14:25:43 +01:00

cpu.h

…

dsp_helper.c

…

gdbstub.c

…

helper.c

target-mips: Use cpu_exec_interrupt qom hook

2014-09-25 18:54:22 +01:00

helper.h

…

kvm_mips.h

…

kvm.c

…

lmi_helper.c

…

machine.c

…

Makefile.objs

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mips-defs.h

target-mips: define ISA_MIPS64R6

2014-10-13 12:38:24 +01:00

op_helper.c

…

TODO

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translate_init.c

…

translate.c

target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6

2014-10-13 12:38:25 +01:00