Balaji Ravikumar 4d46d84ea7 disas/riscv: Add decode for Zawrs extension ...

Add disassembly support for these instructions from Zawrs:

* wrs.sto
* wrs.nto

Signed-off-by: Balaji Ravikumar <bravikumar@rivosinc.com>
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240705165316.127494-1-rbradford@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2024-07-18 12:08:44 +10:00

..

alpha.c

…

capstone.c

…

cris.c

…

disas-common.c

…

disas-host.c

…

disas-internal.h

…

disas-mon.c

…

disas-target.c

…

hexagon.c

…

hppa.c

…

m68k.c

…

meson.build

…

microblaze.c

disas/microblaze: Split get_field_special

2024-06-05 12:29:54 -07:00

mips.c

…

nanomips.c

…

objdump.c

…

riscv-xthead.c

…

riscv-xthead.h

…

riscv-xventana.c

…

riscv-xventana.h

…

riscv.c

disas/riscv: Add decode for Zawrs extension

2024-07-18 12:08:44 +10:00

riscv.h

…

sh4.c

…

sparc.c

…

xtensa.c

…