Arnaud Minier 87b77e6e01 hw/char/stm32l4x5_usart: Enable serial read and write ...

Implement the ability to read and write characters to the
usart using the serial port.

The character transmission is based on the
cmsdk-apb-uart implementation.

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240329174402.60382-3-arnaud.minier@telecom-paris.fr
[PMM: fixed a few checkpatch nits]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2024-04-25 10:21:59 +01:00

..

avr_usart.h

include/: spelling fixes

2023-09-08 13:08:52 +03:00

bcm2835_aux.h

…

cadence_uart.h

…

cmsdk-apb-uart.h

…

digic-uart.h

…

escc.h

escc: emulate dip switch language layout settings on SUN keyboard

2023-06-28 10:54:25 +01:00

goldfish_tty.h

…

grlib_uart.h

hw/sparc/grlib: split out the headers for each peripherals

2024-02-15 16:58:46 +01:00

ibex_uart.h

…

imx_serial.h

hw/char/imx_serial: Implement receive FIFO and ageing timer

2024-01-26 11:34:21 +00:00

mchp_pfsoc_mmuart.h

…

nrf51_uart.h

…

parallel-isa.h

hw/char/parallel-isa: Implement relocation and enabling/disabling for TYPE_ISA_PARALLEL

2024-02-14 06:09:32 -05:00

parallel.h

hw/char/parallel: Move portio_list from ParallelState to ISAParallelState

2024-02-14 06:09:32 -05:00

pl011.h

…

renesas_sci.h

…

riscv_htif.h

hw/riscv: Add signature dump function for spike to run ACT tests

2023-05-05 10:49:50 +10:00

serial.h

hw/char/serial-isa: Implement relocation and enabling/disabling for TYPE_ISA_SERIAL

2024-02-14 06:09:32 -05:00

shakti_uart.h

…

sifive_uart.h

…

stm32f2xx_usart.h

hw/char/stm32f2xx_usart: Add more definitions for CR1 register

2023-11-02 13:36:45 +00:00

stm32l4x5_usart.h

hw/char/stm32l4x5_usart: Enable serial read and write

2024-04-25 10:21:59 +01:00

xilinx_uartlite.h

…