965d5d0681
We will use VPSHLD, VPSHLDV and VPSHRDV for 16-bit rotates. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
39 lines
1.7 KiB
C
39 lines
1.7 KiB
C
/*
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* Copyright (c) 2019 Linaro
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Target-specific opcodes for host vector expansion. These will be
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* emitted by tcg_expand_vec_op. For those familiar with GCC internals,
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* consider these to be UNSPEC with names.
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*/
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DEF(x86_shufps_vec, 1, 2, 1, IMPLVEC)
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DEF(x86_vpblendvb_vec, 1, 3, 0, IMPLVEC)
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DEF(x86_blend_vec, 1, 2, 1, IMPLVEC)
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DEF(x86_packss_vec, 1, 2, 0, IMPLVEC)
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DEF(x86_packus_vec, 1, 2, 0, IMPLVEC)
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DEF(x86_psrldq_vec, 1, 1, 1, IMPLVEC)
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DEF(x86_vperm2i128_vec, 1, 2, 1, IMPLVEC)
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DEF(x86_punpckl_vec, 1, 2, 0, IMPLVEC)
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DEF(x86_punpckh_vec, 1, 2, 0, IMPLVEC)
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DEF(x86_vpshldi_vec, 1, 2, 1, IMPLVEC)
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DEF(x86_vpshldv_vec, 1, 3, 0, IMPLVEC)
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DEF(x86_vpshrdv_vec, 1, 3, 0, IMPLVEC)
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