qemu/target/ppc
Greg Kurz 3e5365b7aa target/ppc: Fix QEMU crash with stxsdx
I've been hitting several QEMU crashes while running a fedora29 ppc64le
guest under TCG. Each time, this would occur several minutes after the
guest reached login:

Fedora 29 (Twenty Nine)
Kernel 4.20.6-200.fc29.ppc64le on an ppc64le (hvc0)

Web console: https://localhost:9090/

localhost login:
tcg/tcg.c:3211: tcg fatal error

This happens because a bug crept up in the gen_stxsdx() helper when it
was converted to use VSR register accessors by commit 8b3b2d75c7
"target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers
for VSR register access".

The code creates a temporary, passes it directly to gen_qemu_st64_i64()
and then to set_cpu_vrsh()... which looks like this was mistakenly
coded as a load instead of a store.

Reverse the logic: read the VSR to the temporary first and then store
it to memory.

Fixes: 8b3b2d75c7
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <155371035249.2038502.12364252604337688538.stgit@bahia.lan>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-29 10:22:22 +11:00
..
translate target/ppc: Fix QEMU crash with stxsdx 2019-03-29 10:22:22 +11:00
arch_dump.c target/ppc: Add helper_mfvscr 2019-02-18 11:00:44 +11:00
compat.c
cpu-models.c
cpu-models.h
cpu-qom.h target/ppc: Implement large decrementer support for TCG 2019-03-12 12:07:49 +11:00
cpu.c
cpu.h target/ppc: Consolidate 64-bit server processor detection in a helper 2019-03-29 10:22:22 +11:00
dfp_helper.c
excp_helper.c target/ppc: Move exception vector offset computation into a function 2019-03-12 14:33:04 +11:00
fpu_helper.c
gdbstub.c
helper_regs.h target/ppc: Consolidate 64-bit server processor detection in a helper 2019-03-29 10:22:22 +11:00
helper.h target/ppc: Flush the TLB locally when the LPIDR is written 2019-02-26 09:21:25 +11:00
int_helper.c target/ppc: convert vmin* and vmax* to vector operations 2019-02-18 11:00:44 +11:00
internal.h target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
kvm_ppc.h target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling 2019-03-12 14:33:04 +11:00
kvm-stub.c
kvm.c spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
machine.c target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.inc.c
misc_helper.c target/ppc: Flush the TLB locally when the LPIDR is written 2019-02-26 09:21:25 +11:00
mmu_helper.c target/ppc/mmu: Use LPCR:HR to chose radix vs. hash translation 2019-02-26 09:21:25 +11:00
mmu-book3s-v3.c target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-book3s-v3.h target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-hash32.c target/ppc: Fix ordering of hash MMU accesses 2019-02-26 09:21:25 +11:00
mmu-hash32.h
mmu-hash64.c target/ppc: Implement large decrementer support for TCG 2019-03-12 12:07:49 +11:00
mmu-hash64.h target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-radix64.c target/ppc: Basic POWER9 bare-metal radix MMU support 2019-02-26 09:21:25 +11:00
mmu-radix64.h target/ppc: Rename PATB/PATBE -> PATE 2019-02-26 09:21:25 +11:00
monitor.c
timebase_helper.c
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
translate_init.inc.c target/ppc: add HV support for POWER9 2019-03-12 14:33:05 +11:00
translate.c target/ppc: Improve comment of bcctr used for spectre v2 mitigation 2019-03-29 10:22:22 +11:00
user_only_helper.c