Max Filippov f68774ccd8 tests/tcg/xtensa: only generate defined exception handlers ... Don't generate handlers for IRQ levels that are not defined for the CPU or for window overflow/underflow exceptions for configs w/o windowed registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2018-09-17 11:09:04 -07:00
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crt.S	tests: mv tests/* -> tests/tcg	2012-01-12 10:03:28 -06:00
linker.ld.S	tests/tcg/xtensa: move exception handlers to separate section	2018-09-17 11:09:04 -07:00
macros.inc	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
Makefile	tests/tcg/xtensa: add test for failed memory transactions	2018-09-17 11:09:04 -07:00
test_b.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_bi.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_boolean.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_break.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_bz.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_cache.S	target-xtensa: add basic tests for cache opcodes	2014-02-24 04:47:02 +04:00
test_clamps.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_extui.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_fail.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_interrupt.S	target/xtensa: tests: clean up interrupt tests	2017-01-15 13:36:09 -08:00
test_loop.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_mac16.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_max.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_min.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_mmu.S	target-xtensa: test cross-page opcode	2014-12-17 05:49:32 +03:00
test_mul16.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_mul32.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_nsa.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_phys_mem.S	tests/tcg/xtensa: add test for failed memory transactions	2018-09-17 11:09:04 -07:00
test_pipeline.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_quo.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_rem.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_rst0.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_s32c1i.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_sar.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_sext.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_shift.S	target-xtensa: allow using core configuration in tests	2014-02-24 04:47:01 +04:00
test_sr.S	target/xtensa: tests: fix memctl SR test	2018-01-09 09:55:38 -08:00
test_timer.S	target/xtensa: tests: add ccount write tests	2017-01-15 13:01:56 -08:00
test_windowed.S	target-xtensa: add entry overflow test	2014-11-10 17:59:13 +03:00
vectors.S	tests/tcg/xtensa: only generate defined exception handlers	2018-09-17 11:09:04 -07:00