dc95b31dac
CSST is defined as: C(0xc802, CSST, SSF, CASS, la1, a2, 0, 0, csst, 0) It means that the first parameter is handled by in1_la1(). in1_la1() fills addr1 field, and not in1. Furthermore, when extract32() is used for the alignment check, the third parameter should specify the number of trailing bits that must be 0. For FC these numbers are: FC=0 (word, 4 bytes): 2 FC=1 (double word, 8 bytes): 3 FC=2 (quad word, 16 bytes): 4 For SC these numbers correspond to the size: SC=0: 0 SC=1: 1 SC=2: 2 SC=3: 3 SC=4: 4 Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-4-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
44 lines
944 B
C
44 lines
944 B
C
#include <stdint.h>
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#include <unistd.h>
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int main(void)
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{
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uint64_t parmlist[] = {
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0xfedcba9876543210ull,
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0,
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0x7777777777777777ull,
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0,
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};
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uint64_t op1 = 0x0123456789abcdefull;
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uint64_t op2 = 0;
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uint64_t op3 = op1;
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uint64_t cc;
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asm volatile(
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" lghi %%r0,%[flags]\n"
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" la %%r1,%[parmlist]\n"
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" csst %[op1],%[op2],%[op3]\n"
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" ipm %[cc]\n"
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: [op1] "+m" (op1),
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[op2] "+m" (op2),
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[op3] "+r" (op3),
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[cc] "=r" (cc)
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: [flags] "K" (0x0301),
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[parmlist] "m" (parmlist)
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: "r0", "r1", "cc", "memory");
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cc = (cc >> 28) & 3;
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if (cc) {
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write(1, "bad cc\n", 7);
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return 1;
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}
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if (op1 != parmlist[0]) {
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write(1, "bad op1\n", 8);
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return 1;
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}
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if (op2 != parmlist[2]) {
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write(1, "bad op2\n", 8);
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return 1;
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}
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return 0;
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}
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