409c1a0bf0
We don't bother with replicating the fast path (tlb_hit) of the old cpu_ldst helpers as it has no measurable effect on performance. This probably indicates we should consider flattening the whole set of helpers but that is out of scope for this change. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> [AJB: directly plumb into softmmu/user helpers] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
206 lines
7.3 KiB
C
206 lines
7.3 KiB
C
/*
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* Generic intermediate code generation.
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*
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* Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef EXEC__TRANSLATOR_H
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#define EXEC__TRANSLATOR_H
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/*
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* Include this header from a target-specific file, and add a
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*
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* DisasContextBase base;
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*
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* member in your target-specific DisasContext.
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*/
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#include "qemu/bswap.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "exec/plugin-gen.h"
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#include "tcg/tcg.h"
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/**
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* DisasJumpType:
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* @DISAS_NEXT: Next instruction in program order.
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* @DISAS_TOO_MANY: Too many instructions translated.
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* @DISAS_NORETURN: Following code is dead.
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* @DISAS_TARGET_*: Start of target-specific conditions.
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*
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* What instruction to disassemble next.
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*/
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typedef enum DisasJumpType {
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DISAS_NEXT,
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DISAS_TOO_MANY,
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DISAS_NORETURN,
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DISAS_TARGET_0,
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DISAS_TARGET_1,
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DISAS_TARGET_2,
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DISAS_TARGET_3,
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DISAS_TARGET_4,
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DISAS_TARGET_5,
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DISAS_TARGET_6,
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DISAS_TARGET_7,
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DISAS_TARGET_8,
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DISAS_TARGET_9,
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DISAS_TARGET_10,
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DISAS_TARGET_11,
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} DisasJumpType;
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/**
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* DisasContextBase:
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* @tb: Translation block for this disassembly.
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* @pc_first: Address of first guest instruction in this TB.
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* @pc_next: Address of next guest instruction in this TB (current during
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* disassembly).
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* @is_jmp: What instruction to disassemble next.
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* @num_insns: Number of translated instructions (including current).
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* @max_insns: Maximum number of instructions to be translated in this TB.
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* @singlestep_enabled: "Hardware" single stepping enabled.
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*
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* Architecture-agnostic disassembly context.
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*/
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typedef struct DisasContextBase {
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TranslationBlock *tb;
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target_ulong pc_first;
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target_ulong pc_next;
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DisasJumpType is_jmp;
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int num_insns;
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int max_insns;
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bool singlestep_enabled;
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} DisasContextBase;
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/**
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* TranslatorOps:
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* @init_disas_context:
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* Initialize the target-specific portions of DisasContext struct.
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* The generic DisasContextBase has already been initialized.
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*
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* @tb_start:
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* Emit any code required before the start of the main loop,
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* after the generic gen_tb_start().
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*
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* @insn_start:
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* Emit the tcg_gen_insn_start opcode.
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*
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* @breakpoint_check:
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* When called, the breakpoint has already been checked to match the PC,
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* but the target may decide the breakpoint missed the address
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* (e.g., due to conditions encoded in their flags). Return true to
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* indicate that the breakpoint did hit, in which case no more breakpoints
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* are checked. If the breakpoint did hit, emit any code required to
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* signal the exception, and set db->is_jmp as necessary to terminate
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* the main loop.
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*
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* @translate_insn:
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* Disassemble one instruction and set db->pc_next for the start
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* of the following instruction. Set db->is_jmp as necessary to
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* terminate the main loop.
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*
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* @tb_stop:
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* Emit any opcodes required to exit the TB, based on db->is_jmp.
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*
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* @disas_log:
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* Print instruction disassembly to log.
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*/
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typedef struct TranslatorOps {
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void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
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void (*tb_start)(DisasContextBase *db, CPUState *cpu);
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void (*insn_start)(DisasContextBase *db, CPUState *cpu);
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bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu,
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const CPUBreakpoint *bp);
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void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
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void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
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void (*disas_log)(const DisasContextBase *db, CPUState *cpu);
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} TranslatorOps;
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/**
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* translator_loop:
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* @ops: Target-specific operations.
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* @db: Disassembly context.
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* @cpu: Target vCPU.
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* @tb: Translation block.
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* @max_insns: Maximum number of insns to translate.
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*
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* Generic translator loop.
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*
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* Translation will stop in the following cases (in order):
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* - When is_jmp set by #TranslatorOps::breakpoint_check.
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* - set to DISAS_TOO_MANY exits after translating one more insn
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* - set to any other value than DISAS_NEXT exits immediately.
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* - When is_jmp set by #TranslatorOps::translate_insn.
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* - set to any value other than DISAS_NEXT exits immediately.
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* - When the TCG operation buffer is full.
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* - When single-stepping is enabled (system-wide or on the current vCPU).
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* - When too many instructions have been translated.
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*/
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void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
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CPUState *cpu, TranslationBlock *tb, int max_insns);
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void translator_loop_temp_check(DisasContextBase *db);
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/*
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* Translator Load Functions
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*
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* These are intended to replace the old cpu_ld*_code functions and
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* are mandatory for front-ends that have been migrated to the common
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* translator_loop. These functions are only intended to be called
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* from the translation stage and should not be called from helper
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* functions. Those functions should be converted to encode the
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* relevant information at translation time.
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*/
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#ifdef CONFIG_USER_ONLY
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#define DO_LOAD(type, name, shift) \
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do { \
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set_helper_retaddr(1); \
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ret = name ## _p(g2h(pc)); \
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clear_helper_retaddr(); \
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} while (0)
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#else
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#define DO_LOAD(type, name, shift) \
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do { \
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int mmu_idx = cpu_mmu_index(env, true); \
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TCGMemOpIdx oi = make_memop_idx(shift, mmu_idx); \
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ret = helper_ret_ ## name ## _cmmu(env, pc, oi, 0); \
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} while (0)
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#endif
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#define GEN_TRANSLATOR_LD(fullname, name, type, shift, swap_fn) \
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static inline type \
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fullname ## _swap(CPUArchState *env, abi_ptr pc, bool do_swap) \
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{ \
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type ret; \
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DO_LOAD(type, name, shift); \
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\
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if (do_swap) { \
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ret = swap_fn(ret); \
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} \
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plugin_insn_append(&ret, sizeof(ret)); \
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return ret; \
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} \
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\
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static inline type fullname(CPUArchState *env, abi_ptr pc) \
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{ \
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return fullname ## _swap(env, pc, false); \
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}
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GEN_TRANSLATOR_LD(translator_ldub, ldub, uint8_t, 0, /* no swap */ )
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GEN_TRANSLATOR_LD(translator_ldsw, ldsw, int16_t, 1, bswap16)
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GEN_TRANSLATOR_LD(translator_lduw, lduw, uint16_t, 1, bswap16)
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GEN_TRANSLATOR_LD(translator_ldl, ldl, uint32_t, 2, bswap32)
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GEN_TRANSLATOR_LD(translator_ldq, ldq, uint64_t, 3, bswap64)
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#undef GEN_TRANSLATOR_LD
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#endif /* EXEC__TRANSLATOR_H */
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