e4ea952fb0
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-41-richard.henderson@linaro.org>
161 lines
4.3 KiB
C
161 lines
4.3 KiB
C
/*
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* BCM2835 Power Management emulation
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*
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* Copyright (C) 2017 Marcin Chojnacki <marcinch7@gmail.com>
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* Copyright (C) 2021 Nolan Leake <nolan@sigbus.net>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "hw/misc/bcm2835_powermgt.h"
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#include "migration/vmstate.h"
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#include "sysemu/runstate.h"
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#define PASSWORD 0x5a000000
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#define PASSWORD_MASK 0xff000000
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#define R_RSTC 0x1c
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#define V_RSTC_RESET 0x20
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#define R_RSTS 0x20
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#define V_RSTS_POWEROFF 0x555 /* Linux uses partition 63 to indicate halt. */
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#define R_WDOG 0x24
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static uint64_t bcm2835_powermgt_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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BCM2835PowerMgtState *s = (BCM2835PowerMgtState *)opaque;
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uint32_t res = 0;
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switch (offset) {
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case R_RSTC:
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res = s->rstc;
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break;
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case R_RSTS:
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res = s->rsts;
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break;
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case R_WDOG:
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res = s->wdog;
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break;
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default:
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_powermgt_read: Unknown offset 0x%08"HWADDR_PRIx
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"\n", offset);
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res = 0;
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break;
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}
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return res;
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}
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static void bcm2835_powermgt_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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BCM2835PowerMgtState *s = (BCM2835PowerMgtState *)opaque;
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if ((value & PASSWORD_MASK) != PASSWORD) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"bcm2835_powermgt_write: Bad password 0x%"PRIx64
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" at offset 0x%08"HWADDR_PRIx"\n",
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value, offset);
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return;
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}
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value = value & ~PASSWORD_MASK;
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switch (offset) {
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case R_RSTC:
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s->rstc = value;
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if (value & V_RSTC_RESET) {
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if ((s->rsts & 0xfff) == V_RSTS_POWEROFF) {
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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} else {
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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}
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}
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break;
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case R_RSTS:
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_powermgt_write: RSTS\n");
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s->rsts = value;
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break;
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case R_WDOG:
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_powermgt_write: WDOG\n");
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s->wdog = value;
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break;
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default:
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qemu_log_mask(LOG_UNIMP,
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"bcm2835_powermgt_write: Unknown offset 0x%08"HWADDR_PRIx
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"\n", offset);
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break;
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}
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}
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static const MemoryRegionOps bcm2835_powermgt_ops = {
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.read = bcm2835_powermgt_read,
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.write = bcm2835_powermgt_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl.min_access_size = 4,
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.impl.max_access_size = 4,
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};
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static const VMStateDescription vmstate_bcm2835_powermgt = {
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.name = TYPE_BCM2835_POWERMGT,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(rstc, BCM2835PowerMgtState),
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VMSTATE_UINT32(rsts, BCM2835PowerMgtState),
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VMSTATE_UINT32(wdog, BCM2835PowerMgtState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void bcm2835_powermgt_init(Object *obj)
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{
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BCM2835PowerMgtState *s = BCM2835_POWERMGT(obj);
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memory_region_init_io(&s->iomem, obj, &bcm2835_powermgt_ops, s,
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TYPE_BCM2835_POWERMGT, 0x200);
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sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
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}
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static void bcm2835_powermgt_reset(DeviceState *dev)
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{
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BCM2835PowerMgtState *s = BCM2835_POWERMGT(dev);
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/* https://elinux.org/BCM2835_registers#PM */
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s->rstc = 0x00000102;
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s->rsts = 0x00001000;
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s->wdog = 0x00000000;
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}
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static void bcm2835_powermgt_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = bcm2835_powermgt_reset;
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dc->vmsd = &vmstate_bcm2835_powermgt;
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}
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static const TypeInfo bcm2835_powermgt_info = {
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.name = TYPE_BCM2835_POWERMGT,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2835PowerMgtState),
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.class_init = bcm2835_powermgt_class_init,
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.instance_init = bcm2835_powermgt_init,
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};
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static void bcm2835_powermgt_register_types(void)
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{
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type_register_static(&bcm2835_powermgt_info);
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}
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type_init(bcm2835_powermgt_register_types)
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