3bb1aed246
Implement the following PowerISA v3.0 instuctions:
xsmaddqp[o]: VSX Scalar Multiply-Add Quad-Precision [using round to Odd]
xsmsubqp[o]: VSX Scalar Multiply-Subtract Quad-Precision [using round
to Odd]
xsnmaddqp[o]: VSX Scalar Negative Multiply-Add Quad-Precision [using
round to Odd]
xsnmsubqp[o]: VSX Scalar Negative Multiply-Subtract Quad-Precision
[using round to Odd]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-38-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
673 lines
28 KiB
Plaintext
673 lines
28 KiB
Plaintext
#
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# Power ISA decode for 32-bit insns (opcode space 0)
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#
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# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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&D rt ra si:int64_t
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@D ...... rt:5 ra:5 si:s16 &D
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&D_bf bf l:bool ra imm
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@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf
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@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf
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%dq_si 4:s12 !function=times_16
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%dq_rtp 22:4 !function=times_2
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@DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si
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%dq_rt_tsx 3:1 21:5
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@DQ_TSX ...... ..... ra:5 ............ .... &D si=%dq_si rt=%dq_rt_tsx
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%rt_tsxp 21:1 22:4 !function=times_2
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@DQ_TSXP ...... ..... ra:5 ............ .... &D si=%dq_si rt=%rt_tsxp
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%ds_si 2:s14 !function=times_4
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@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
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%ds_rtp 22:4 !function=times_2
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@DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si
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&DX_b vrt b
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%dx_b 6:10 16:5 0:1
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@DX_b ...... vrt:5 ..... .......... ..... . &DX_b b=%dx_b
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&DX rt d
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%dx_d 6:s10 16:5 0:1
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@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
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&VA vrt vra vrb rc
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@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA
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&VC vrt vra vrb rc:bool
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@VC ...... vrt:5 vra:5 vrb:5 rc:1 .......... &VC
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&VN vrt vra vrb sh
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@VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN
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&VX vrt vra vrb
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@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
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&VX_bf bf vra vrb
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@VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf
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&VX_mp rt mp:bool vrb
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@VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp
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&VX_n rt vrb n
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@VX_n ...... rt:5 .. n:3 vrb:5 ........... &VX_n
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&VX_tb_rc vrt vrb rc:bool
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@VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc
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&VX_uim4 vrt uim vrb
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@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
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&VX_tb vrt vrb
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@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb
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&X rt ra rb
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@X ...... rt:5 ra:5 rb:5 .......... . &X
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&X_rc rt ra rb rc:bool
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@X_rc ...... rt:5 ra:5 rb:5 .......... rc:1 &X_rc
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%x_frtp 22:4 !function=times_2
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%x_frap 17:4 !function=times_2
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%x_frbp 12:4 !function=times_2
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@X_tp_ap_bp_rc ...... ....0 ....0 ....0 .......... rc:1 &X_rc rt=%x_frtp ra=%x_frap rb=%x_frbp
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@X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp
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&X_tb_rc rt rb rc:bool
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@X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc
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@X_tbp_rc ...... ....0 ..... ....0 .......... rc:1 &X_tb_rc rt=%x_frtp rb=%x_frbp
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@X_tp_b_rc ...... ....0 ..... rb:5 .......... rc:1 &X_tb_rc rt=%x_frtp
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@X_t_bp_rc ...... rt:5 ..... ....0 .......... rc:1 &X_tb_rc rb=%x_frbp
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&X_bi rt bi
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@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
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&X_bf bf ra rb
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@X_bf ...... bf:3 .. ra:5 rb:5 .......... . &X_bf
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@X_bf_ap_bp ...... bf:3 .. ....0 ....0 .......... . &X_bf ra=%x_frap rb=%x_frbp
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@X_bf_a_bp ...... bf:3 .. ra:5 ....0 .......... . &X_bf rb=%x_frbp
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&X_bf_uim bf uim rb
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@X_bf_uim ...... bf:3 . uim:6 rb:5 .......... . &X_bf_uim
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@X_bf_uim_bp ...... bf:3 . uim:6 ....0 .......... . &X_bf_uim rb=%x_frbp
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&X_bfl bf l:bool ra rb
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@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
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%x_xt 0:1 21:5
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&X_imm5 xt imm:uint8_t vrb
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@X_imm5 ...... ..... imm:5 vrb:5 .......... . &X_imm5 xt=%x_xt
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&X_imm8 xt imm:uint8_t
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@X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt
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&X_uim5 xt uim:uint8_t
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@X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt
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&X_tb_sp_rc rt rb sp rc:bool
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@X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc
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@X_tbp_sp_rc ...... ....0 sp:2 ... ....0 .......... rc:1 &X_tb_sp_rc rt=%x_frtp rb=%x_frbp
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&X_tb_s_rc rt rb s:bool rc:bool
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@X_tb_s_rc ...... rt:5 s:1 .... rb:5 .......... rc:1 &X_tb_s_rc
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@X_tbp_s_rc ...... ....0 s:1 .... ....0 .......... rc:1 &X_tb_s_rc rt=%x_frtp rb=%x_frbp
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%x_rt_tsx 0:1 21:5
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@X_TSX ...... ..... ra:5 rb:5 .......... . &X rt=%x_rt_tsx
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@X_TSXP ...... ..... ra:5 rb:5 .......... . &X rt=%rt_tsxp
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&X_frtp_vrb frtp vrb
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@X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp
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&X_vrt_frbp vrt frbp
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@X_vrt_frbp ...... vrt:5 ..... ....0 .......... . &X_vrt_frbp frbp=%x_frbp
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%xx_xt 0:1 21:5
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%xx_xb 1:1 11:5
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%xx_xa 2:1 16:5
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%xx_xc 3:1 6:5
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&XX2 xt xb uim:uint8_t
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@XX2 ...... ..... ... uim:2 ..... ......... .. &XX2 xt=%xx_xt xb=%xx_xb
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&XX3 xt xa xb
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@XX3 ...... ..... ..... ..... ........ ... &XX3 xt=%xx_xt xa=%xx_xa xb=%xx_xb
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&XX3_dm xt xa xb dm
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@XX3_dm ...... ..... ..... ..... . dm:2 ..... ... &XX3_dm xt=%xx_xt xa=%xx_xa xb=%xx_xb
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&XX4 xt xa xb xc
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@XX4 ...... ..... ..... ..... ..... .. .... &XX4 xt=%xx_xt xa=%xx_xa xb=%xx_xb xc=%xx_xc
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&Z22_bf_fra bf fra dm
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@Z22_bf_fra ...... bf:3 .. fra:5 dm:6 ......... . &Z22_bf_fra
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%z22_frap 17:4 !function=times_2
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@Z22_bf_frap ...... bf:3 .. ....0 dm:6 ......... . &Z22_bf_fra fra=%z22_frap
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&Z22_ta_sh_rc rt ra sh rc:bool
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@Z22_ta_sh_rc ...... rt:5 ra:5 sh:6 ......... rc:1 &Z22_ta_sh_rc
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%z22_frtp 22:4 !function=times_2
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@Z22_tap_sh_rc ...... ....0 ....0 sh:6 ......... rc:1 &Z22_ta_sh_rc rt=%z22_frtp ra=%z22_frap
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&Z23_tab frt fra frb rmc rc:bool
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@Z23_tab ...... frt:5 fra:5 frb:5 rmc:2 ........ rc:1 &Z23_tab
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%z23_frtp 22:4 !function=times_2
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%z23_frap 17:4 !function=times_2
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%z23_frbp 12:4 !function=times_2
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@Z23_tabp ...... ....0 ....0 ....0 rmc:2 ........ rc:1 &Z23_tab frt=%z23_frtp fra=%z23_frap frb=%z23_frbp
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@Z23_tp_a_bp ...... ....0 fra:5 ....0 rmc:2 ........ rc:1 &Z23_tab frt=%z23_frtp frb=%z23_frbp
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&Z23_tb frt frb r:bool rmc rc:bool
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@Z23_tb ...... frt:5 .... r:1 frb:5 rmc:2 ........ rc:1 &Z23_tb
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@Z23_tbp ...... ....0 .... r:1 ....0 rmc:2 ........ rc:1 &Z23_tb frt=%z23_frtp frb=%z23_frbp
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&Z23_te_tb te frt frb rmc rc:bool
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@Z23_te_tb ...... frt:5 te:5 frb:5 rmc:2 ........ rc:1 &Z23_te_tb
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@Z23_te_tbp ...... ....0 te:5 ....0 rmc:2 ........ rc:1 &Z23_te_tb frt=%z23_frtp frb=%z23_frbp
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### Fixed-Point Load Instructions
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LBZ 100010 ..... ..... ................ @D
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LBZU 100011 ..... ..... ................ @D
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LBZX 011111 ..... ..... ..... 0001010111 - @X
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LBZUX 011111 ..... ..... ..... 0001110111 - @X
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LHZ 101000 ..... ..... ................ @D
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LHZU 101001 ..... ..... ................ @D
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LHZX 011111 ..... ..... ..... 0100010111 - @X
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LHZUX 011111 ..... ..... ..... 0100110111 - @X
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LHA 101010 ..... ..... ................ @D
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LHAU 101011 ..... ..... ................ @D
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LHAX 011111 ..... ..... ..... 0101010111 - @X
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LHAXU 011111 ..... ..... ..... 0101110111 - @X
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LWZ 100000 ..... ..... ................ @D
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LWZU 100001 ..... ..... ................ @D
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LWZX 011111 ..... ..... ..... 0000010111 - @X
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LWZUX 011111 ..... ..... ..... 0000110111 - @X
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LWA 111010 ..... ..... ..............10 @DS
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LWAX 011111 ..... ..... ..... 0101010101 - @X
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LWAUX 011111 ..... ..... ..... 0101110101 - @X
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LD 111010 ..... ..... ..............00 @DS
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LDU 111010 ..... ..... ..............01 @DS
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LDX 011111 ..... ..... ..... 0000010101 - @X
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LDUX 011111 ..... ..... ..... 0000110101 - @X
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LQ 111000 ..... ..... ............ ---- @DQ_rtp
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### Fixed-Point Store Instructions
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STB 100110 ..... ..... ................ @D
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STBU 100111 ..... ..... ................ @D
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STBX 011111 ..... ..... ..... 0011010111 - @X
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STBUX 011111 ..... ..... ..... 0011110111 - @X
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STH 101100 ..... ..... ................ @D
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STHU 101101 ..... ..... ................ @D
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STHX 011111 ..... ..... ..... 0110010111 - @X
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STHUX 011111 ..... ..... ..... 0110110111 - @X
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STW 100100 ..... ..... ................ @D
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STWU 100101 ..... ..... ................ @D
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STWX 011111 ..... ..... ..... 0010010111 - @X
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STWUX 011111 ..... ..... ..... 0010110111 - @X
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STD 111110 ..... ..... ..............00 @DS
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STDU 111110 ..... ..... ..............01 @DS
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STDX 011111 ..... ..... ..... 0010010101 - @X
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STDUX 011111 ..... ..... ..... 0010110101 - @X
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STQ 111110 ..... ..... ..............10 @DS_rtp
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### Fixed-Point Compare Instructions
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CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl
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CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl
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CMPI 001011 ... - . ..... ................ @D_bfs
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CMPLI 001010 ... - . ..... ................ @D_bfu
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### Fixed-Point Arithmetic Instructions
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ADDI 001110 ..... ..... ................ @D
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ADDIS 001111 ..... ..... ................ @D
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ADDPCIS 010011 ..... ..... .......... 00010 . @DX
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## Fixed-Point Logical Instructions
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CFUGED 011111 ..... ..... ..... 0011011100 - @X
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CNTLZDM 011111 ..... ..... ..... 0000111011 - @X
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CNTTZDM 011111 ..... ..... ..... 1000111011 - @X
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PDEPD 011111 ..... ..... ..... 0010011100 - @X
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PEXTD 011111 ..... ..... ..... 0010111100 - @X
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### Float-Point Load Instructions
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LFS 110000 ..... ..... ................ @D
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LFSU 110001 ..... ..... ................ @D
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LFSX 011111 ..... ..... ..... 1000010111 - @X
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LFSUX 011111 ..... ..... ..... 1000110111 - @X
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LFD 110010 ..... ..... ................ @D
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LFDU 110011 ..... ..... ................ @D
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LFDX 011111 ..... ..... ..... 1001010111 - @X
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LFDUX 011111 ..... ..... ..... 1001110111 - @X
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### Float-Point Store Instructions
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STFS 110100 ..... ...... ............... @D
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STFSU 110101 ..... ...... ............... @D
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STFSX 011111 ..... ...... .... 1010010111 - @X
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STFSUX 011111 ..... ...... .... 1010110111 - @X
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STFD 110110 ..... ...... ............... @D
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STFDU 110111 ..... ...... ............... @D
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STFDX 011111 ..... ...... .... 1011010111 - @X
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STFDUX 011111 ..... ...... .... 1011110111 - @X
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### Move To/From System Register Instructions
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SETBC 011111 ..... ..... ----- 0110000000 - @X_bi
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SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
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SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
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SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
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### Decimal Floating-Point Arithmetic Instructions
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DADD 111011 ..... ..... ..... 0000000010 . @X_rc
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DADDQ 111111 ..... ..... ..... 0000000010 . @X_tp_ap_bp_rc
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DSUB 111011 ..... ..... ..... 1000000010 . @X_rc
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DSUBQ 111111 ..... ..... ..... 1000000010 . @X_tp_ap_bp_rc
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DMUL 111011 ..... ..... ..... 0000100010 . @X_rc
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DMULQ 111111 ..... ..... ..... 0000100010 . @X_tp_ap_bp_rc
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DDIV 111011 ..... ..... ..... 1000100010 . @X_rc
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DDIVQ 111111 ..... ..... ..... 1000100010 . @X_tp_ap_bp_rc
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### Decimal Floating-Point Compare Instructions
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DCMPU 111011 ... -- ..... ..... 1010000010 - @X_bf
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DCMPUQ 111111 ... -- ..... ..... 1010000010 - @X_bf_ap_bp
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DCMPO 111011 ... -- ..... ..... 0010000010 - @X_bf
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DCMPOQ 111111 ... -- ..... ..... 0010000010 - @X_bf_ap_bp
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### Decimal Floating-Point Test Instructions
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DTSTDC 111011 ... -- ..... ...... 011000010 - @Z22_bf_fra
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DTSTDCQ 111111 ... -- ..... ...... 011000010 - @Z22_bf_frap
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DTSTDG 111011 ... -- ..... ...... 011100010 - @Z22_bf_fra
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DTSTDGQ 111111 ... -- ..... ...... 011100010 - @Z22_bf_frap
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DTSTEX 111011 ... -- ..... ..... 0010100010 - @X_bf
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DTSTEXQ 111111 ... -- ..... ..... 0010100010 - @X_bf_ap_bp
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DTSTSF 111011 ... -- ..... ..... 1010100010 - @X_bf
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DTSTSFQ 111111 ... -- ..... ..... 1010100010 - @X_bf_a_bp
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DTSTSFI 111011 ... - ...... ..... 1010100011 - @X_bf_uim
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DTSTSFIQ 111111 ... - ...... ..... 1010100011 - @X_bf_uim_bp
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### Decimal Floating-Point Quantum Adjustment Instructions
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DQUAI 111011 ..... ..... ..... .. 01000011 . @Z23_te_tb
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DQUAIQ 111111 ..... ..... ..... .. 01000011 . @Z23_te_tbp
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DQUA 111011 ..... ..... ..... .. 00000011 . @Z23_tab
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DQUAQ 111111 ..... ..... ..... .. 00000011 . @Z23_tabp
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DRRND 111011 ..... ..... ..... .. 00100011 . @Z23_tab
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DRRNDQ 111111 ..... ..... ..... .. 00100011 . @Z23_tp_a_bp
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DRINTX 111011 ..... ---- . ..... .. 01100011 . @Z23_tb
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DRINTXQ 111111 ..... ---- . ..... .. 01100011 . @Z23_tbp
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DRINTN 111011 ..... ---- . ..... .. 11100011 . @Z23_tb
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DRINTNQ 111111 ..... ---- . ..... .. 11100011 . @Z23_tbp
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### Decimal Floating-Point Conversion Instructions
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DCTDP 111011 ..... ----- ..... 0100000010 . @X_tb_rc
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DCTQPQ 111111 ..... ----- ..... 0100000010 . @X_tp_b_rc
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DRSP 111011 ..... ----- ..... 1100000010 . @X_tb_rc
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DRDPQ 111111 ..... ----- ..... 1100000010 . @X_tbp_rc
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DCFFIX 111011 ..... ----- ..... 1100100010 . @X_tb_rc
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DCFFIXQ 111111 ..... ----- ..... 1100100010 . @X_tp_b_rc
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DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb
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DCTFIX 111011 ..... ----- ..... 0100100010 . @X_tb_rc
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DCTFIXQ 111111 ..... ----- ..... 0100100010 . @X_t_bp_rc
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DCTFIXQQ 111111 ..... 00001 ..... 1111100010 - @X_vrt_frbp
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### Decimal Floating-Point Format Instructions
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DDEDPD 111011 ..... .. --- ..... 0101000010 . @X_tb_sp_rc
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DDEDPDQ 111111 ..... .. --- ..... 0101000010 . @X_tbp_sp_rc
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DENBCD 111011 ..... . ---- ..... 1101000010 . @X_tb_s_rc
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DENBCDQ 111111 ..... . ---- ..... 1101000010 . @X_tbp_s_rc
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DXEX 111011 ..... ----- ..... 0101100010 . @X_tb_rc
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DXEXQ 111111 ..... ----- ..... 0101100010 . @X_t_bp_rc
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DIEX 111011 ..... ..... ..... 1101100010 . @X_rc
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DIEXQ 111111 ..... ..... ..... 1101100010 . @X_tp_a_bp_rc
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DSCLI 111011 ..... ..... ...... 001000010 . @Z22_ta_sh_rc
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DSCLIQ 111111 ..... ..... ...... 001000010 . @Z22_tap_sh_rc
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DSCRI 111011 ..... ..... ...... 001100010 . @Z22_ta_sh_rc
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DSCRIQ 111111 ..... ..... ...... 001100010 . @Z22_tap_sh_rc
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## Vector Integer Instructions
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VCMPEQUB 000100 ..... ..... ..... . 0000000110 @VC
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VCMPEQUH 000100 ..... ..... ..... . 0001000110 @VC
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VCMPEQUW 000100 ..... ..... ..... . 0010000110 @VC
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VCMPEQUD 000100 ..... ..... ..... . 0011000111 @VC
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VCMPEQUQ 000100 ..... ..... ..... . 0111000111 @VC
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VCMPGTSB 000100 ..... ..... ..... . 1100000110 @VC
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VCMPGTSH 000100 ..... ..... ..... . 1101000110 @VC
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VCMPGTSW 000100 ..... ..... ..... . 1110000110 @VC
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VCMPGTSD 000100 ..... ..... ..... . 1111000111 @VC
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VCMPGTSQ 000100 ..... ..... ..... . 1110000111 @VC
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VCMPGTUB 000100 ..... ..... ..... . 1000000110 @VC
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VCMPGTUH 000100 ..... ..... ..... . 1001000110 @VC
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VCMPGTUW 000100 ..... ..... ..... . 1010000110 @VC
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VCMPGTUD 000100 ..... ..... ..... . 1011000111 @VC
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VCMPGTUQ 000100 ..... ..... ..... . 1010000111 @VC
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VCMPNEB 000100 ..... ..... ..... . 0000000111 @VC
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VCMPNEH 000100 ..... ..... ..... . 0001000111 @VC
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VCMPNEW 000100 ..... ..... ..... . 0010000111 @VC
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VCMPNEZB 000100 ..... ..... ..... . 0100000111 @VC
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VCMPNEZH 000100 ..... ..... ..... . 0101000111 @VC
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VCMPNEZW 000100 ..... ..... ..... . 0110000111 @VC
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VCMPSQ 000100 ... -- ..... ..... 00101000001 @VX_bf
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VCMPUQ 000100 ... -- ..... ..... 00100000001 @VX_bf
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## Vector Bit Manipulation Instruction
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VGNB 000100 ..... -- ... ..... 10011001100 @VX_n
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VCFUGED 000100 ..... ..... ..... 10101001101 @VX
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VCLZDM 000100 ..... ..... ..... 11110000100 @VX
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VCTZDM 000100 ..... ..... ..... 11111000100 @VX
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VPDEPD 000100 ..... ..... ..... 10111001101 @VX
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VPEXTD 000100 ..... ..... ..... 10110001101 @VX
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## Vector Permute and Formatting Instruction
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VEXTDUBVLX 000100 ..... ..... ..... ..... 011000 @VA
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VEXTDUBVRX 000100 ..... ..... ..... ..... 011001 @VA
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VEXTDUHVLX 000100 ..... ..... ..... ..... 011010 @VA
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VEXTDUHVRX 000100 ..... ..... ..... ..... 011011 @VA
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VEXTDUWVLX 000100 ..... ..... ..... ..... 011100 @VA
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VEXTDUWVRX 000100 ..... ..... ..... ..... 011101 @VA
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VEXTDDVLX 000100 ..... ..... ..... ..... 011110 @VA
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VEXTDDVRX 000100 ..... ..... ..... ..... 011111 @VA
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VINSERTB 000100 ..... - .... ..... 01100001101 @VX_uim4
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VINSERTH 000100 ..... - .... ..... 01101001101 @VX_uim4
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VINSERTW 000100 ..... - .... ..... 01110001101 @VX_uim4
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VINSERTD 000100 ..... - .... ..... 01111001101 @VX_uim4
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VINSBLX 000100 ..... ..... ..... 01000001111 @VX
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VINSBRX 000100 ..... ..... ..... 01100001111 @VX
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VINSHLX 000100 ..... ..... ..... 01001001111 @VX
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VINSHRX 000100 ..... ..... ..... 01101001111 @VX
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VINSWLX 000100 ..... ..... ..... 01010001111 @VX
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VINSWRX 000100 ..... ..... ..... 01110001111 @VX
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VINSDLX 000100 ..... ..... ..... 01011001111 @VX
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VINSDRX 000100 ..... ..... ..... 01111001111 @VX
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VINSW 000100 ..... - .... ..... 00011001111 @VX_uim4
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VINSD 000100 ..... - .... ..... 00111001111 @VX_uim4
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VINSBVLX 000100 ..... ..... ..... 00000001111 @VX
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VINSBVRX 000100 ..... ..... ..... 00100001111 @VX
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VINSHVLX 000100 ..... ..... ..... 00001001111 @VX
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VINSHVRX 000100 ..... ..... ..... 00101001111 @VX
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VINSWVLX 000100 ..... ..... ..... 00010001111 @VX
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VINSWVRX 000100 ..... ..... ..... 00110001111 @VX
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VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN
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VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN
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VPERM 000100 ..... ..... ..... ..... 101011 @VA
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VPERMR 000100 ..... ..... ..... ..... 111011 @VA
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VSEL 000100 ..... ..... ..... ..... 101010 @VA
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## Vector Integer Shift Instruction
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VSLB 000100 ..... ..... ..... 00100000100 @VX
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VSLH 000100 ..... ..... ..... 00101000100 @VX
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VSLW 000100 ..... ..... ..... 00110000100 @VX
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VSLD 000100 ..... ..... ..... 10111000100 @VX
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VSLQ 000100 ..... ..... ..... 00100000101 @VX
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VSRB 000100 ..... ..... ..... 01000000100 @VX
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VSRH 000100 ..... ..... ..... 01001000100 @VX
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VSRW 000100 ..... ..... ..... 01010000100 @VX
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VSRD 000100 ..... ..... ..... 11011000100 @VX
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VSRQ 000100 ..... ..... ..... 01000000101 @VX
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VSRAB 000100 ..... ..... ..... 01100000100 @VX
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VSRAH 000100 ..... ..... ..... 01101000100 @VX
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VSRAW 000100 ..... ..... ..... 01110000100 @VX
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VSRAD 000100 ..... ..... ..... 01111000100 @VX
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VSRAQ 000100 ..... ..... ..... 01100000101 @VX
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VRLB 000100 ..... ..... ..... 00000000100 @VX
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VRLH 000100 ..... ..... ..... 00001000100 @VX
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VRLW 000100 ..... ..... ..... 00010000100 @VX
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VRLD 000100 ..... ..... ..... 00011000100 @VX
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VRLQ 000100 ..... ..... ..... 00000000101 @VX
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VRLWMI 000100 ..... ..... ..... 00010000101 @VX
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VRLDMI 000100 ..... ..... ..... 00011000101 @VX
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VRLQMI 000100 ..... ..... ..... 00001000101 @VX
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VRLWNM 000100 ..... ..... ..... 00110000101 @VX
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VRLDNM 000100 ..... ..... ..... 00111000101 @VX
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VRLQNM 000100 ..... ..... ..... 00101000101 @VX
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## Vector Integer Arithmetic Instructions
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VEXTSB2W 000100 ..... 10000 ..... 11000000010 @VX_tb
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VEXTSH2W 000100 ..... 10001 ..... 11000000010 @VX_tb
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VEXTSB2D 000100 ..... 11000 ..... 11000000010 @VX_tb
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VEXTSH2D 000100 ..... 11001 ..... 11000000010 @VX_tb
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VEXTSW2D 000100 ..... 11010 ..... 11000000010 @VX_tb
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VEXTSD2Q 000100 ..... 11011 ..... 11000000010 @VX_tb
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## Vector Mask Manipulation Instructions
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MTVSRBM 000100 ..... 10000 ..... 11001000010 @VX_tb
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MTVSRHM 000100 ..... 10001 ..... 11001000010 @VX_tb
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MTVSRWM 000100 ..... 10010 ..... 11001000010 @VX_tb
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MTVSRDM 000100 ..... 10011 ..... 11001000010 @VX_tb
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MTVSRQM 000100 ..... 10100 ..... 11001000010 @VX_tb
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MTVSRBMI 000100 ..... ..... .......... 01010 . @DX_b
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VEXPANDBM 000100 ..... 00000 ..... 11001000010 @VX_tb
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VEXPANDHM 000100 ..... 00001 ..... 11001000010 @VX_tb
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VEXPANDWM 000100 ..... 00010 ..... 11001000010 @VX_tb
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VEXPANDDM 000100 ..... 00011 ..... 11001000010 @VX_tb
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VEXPANDQM 000100 ..... 00100 ..... 11001000010 @VX_tb
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VEXTRACTBM 000100 ..... 01000 ..... 11001000010 @VX_tb
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VEXTRACTHM 000100 ..... 01001 ..... 11001000010 @VX_tb
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VEXTRACTWM 000100 ..... 01010 ..... 11001000010 @VX_tb
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VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb
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VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb
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VCNTMBB 000100 ..... 1100 . ..... 11001000010 @VX_mp
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VCNTMBH 000100 ..... 1101 . ..... 11001000010 @VX_mp
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VCNTMBW 000100 ..... 1110 . ..... 11001000010 @VX_mp
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VCNTMBD 000100 ..... 1111 . ..... 11001000010 @VX_mp
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|
## Vector Multiply Instruction
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VMULESB 000100 ..... ..... ..... 01100001000 @VX
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VMULOSB 000100 ..... ..... ..... 00100001000 @VX
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VMULEUB 000100 ..... ..... ..... 01000001000 @VX
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VMULOUB 000100 ..... ..... ..... 00000001000 @VX
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VMULESH 000100 ..... ..... ..... 01101001000 @VX
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VMULOSH 000100 ..... ..... ..... 00101001000 @VX
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VMULEUH 000100 ..... ..... ..... 01001001000 @VX
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VMULOUH 000100 ..... ..... ..... 00001001000 @VX
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VMULESW 000100 ..... ..... ..... 01110001000 @VX
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VMULOSW 000100 ..... ..... ..... 00110001000 @VX
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VMULEUW 000100 ..... ..... ..... 01010001000 @VX
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VMULOUW 000100 ..... ..... ..... 00010001000 @VX
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VMULESD 000100 ..... ..... ..... 01111001000 @VX
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VMULOSD 000100 ..... ..... ..... 00111001000 @VX
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VMULEUD 000100 ..... ..... ..... 01011001000 @VX
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VMULOUD 000100 ..... ..... ..... 00011001000 @VX
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VMULHSW 000100 ..... ..... ..... 01110001001 @VX
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VMULHUW 000100 ..... ..... ..... 01010001001 @VX
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VMULHSD 000100 ..... ..... ..... 01111001001 @VX
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VMULHUD 000100 ..... ..... ..... 01011001001 @VX
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VMULLD 000100 ..... ..... ..... 00111001001 @VX
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|
|
## Vector Multiply-Sum Instructions
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VMSUMCUD 000100 ..... ..... ..... ..... 010111 @VA
|
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VMSUMUDM 000100 ..... ..... ..... ..... 100011 @VA
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|
|
## Vector String Instructions
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VSTRIBL 000100 ..... 00000 ..... . 0000001101 @VX_tb_rc
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VSTRIBR 000100 ..... 00001 ..... . 0000001101 @VX_tb_rc
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VSTRIHL 000100 ..... 00010 ..... . 0000001101 @VX_tb_rc
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VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
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VCLRLB 000100 ..... ..... ..... 00110001101 @VX
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VCLRRB 000100 ..... ..... ..... 00111001101 @VX
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|
|
# VSX Load/Store Instructions
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|
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LXV 111101 ..... ..... ............ . 001 @DQ_TSX
|
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STXV 111101 ..... ..... ............ . 101 @DQ_TSX
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LXVP 000110 ..... ..... ............ 0000 @DQ_TSXP
|
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STXVP 000110 ..... ..... ............ 0001 @DQ_TSXP
|
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LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX
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STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX
|
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LXVPX 011111 ..... ..... ..... 0101001101 - @X_TSXP
|
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STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP
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## VSX Scalar Multiply-Add Instructions
|
|
|
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XSMADDADP 111100 ..... ..... ..... 00100001 . . . @XX3
|
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XSMADDMDP 111100 ..... ..... ..... 00101001 . . . @XX3
|
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XSMADDASP 111100 ..... ..... ..... 00000001 . . . @XX3
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XSMADDMSP 111100 ..... ..... ..... 00001001 . . . @XX3
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XSMADDQP 111111 ..... ..... ..... 0110000100 . @X_rc
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XSMSUBADP 111100 ..... ..... ..... 00110001 . . . @XX3
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XSMSUBMDP 111100 ..... ..... ..... 00111001 . . . @XX3
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XSMSUBASP 111100 ..... ..... ..... 00010001 . . . @XX3
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XSMSUBMSP 111100 ..... ..... ..... 00011001 . . . @XX3
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XSMSUBQP 111111 ..... ..... ..... 0110100100 . @X_rc
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XSNMADDASP 111100 ..... ..... ..... 10000001 . . . @XX3
|
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XSNMADDMSP 111100 ..... ..... ..... 10001001 . . . @XX3
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XSNMADDADP 111100 ..... ..... ..... 10100001 . . . @XX3
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XSNMADDMDP 111100 ..... ..... ..... 10101001 . . . @XX3
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XSNMADDQP 111111 ..... ..... ..... 0111000100 . @X_rc
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XSNMSUBASP 111100 ..... ..... ..... 10010001 . . . @XX3
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XSNMSUBMSP 111100 ..... ..... ..... 10011001 . . . @XX3
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XSNMSUBADP 111100 ..... ..... ..... 10110001 . . . @XX3
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XSNMSUBMDP 111100 ..... ..... ..... 10111001 . . . @XX3
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XSNMSUBQP 111111 ..... ..... ..... 0111100100 . @X_rc
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|
|
## VSX splat instruction
|
|
|
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XXSPLTIB 111100 ..... 00 ........ 0101101000 . @X_imm8
|
|
XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2
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|
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## VSX Permute Instructions
|
|
|
|
XXPERM 111100 ..... ..... ..... 00011010 ... @XX3
|
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XXPERMR 111100 ..... ..... ..... 00111010 ... @XX3
|
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XXPERMDI 111100 ..... ..... ..... 0 .. 01010 ... @XX3_dm
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XXSEL 111100 ..... ..... ..... ..... 11 .... @XX4
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|
|
## VSX Vector Generate PCV
|
|
|
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XXGENPCVBM 111100 ..... ..... ..... 1110010100 . @X_imm5
|
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XXGENPCVHM 111100 ..... ..... ..... 1110010101 . @X_imm5
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XXGENPCVWM 111100 ..... ..... ..... 1110110100 . @X_imm5
|
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XXGENPCVDM 111100 ..... ..... ..... 1110110101 . @X_imm5
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|
## VSX Vector Load Special Value Instruction
|
|
|
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LXVKQ 111100 ..... 11111 ..... 0101101000 . @X_uim5
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## VSX Comparison Instructions
|
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|
|
XSMAXCDP 111100 ..... ..... ..... 10000000 ... @XX3
|
|
XSMINCDP 111100 ..... ..... ..... 10001000 ... @XX3
|
|
XSMAXJDP 111100 ..... ..... ..... 10010000 ... @XX3
|
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XSMINJDP 111100 ..... ..... ..... 10011000 ... @XX3
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## VSX Binary Floating-Point Convert Instructions
|
|
|
|
XSCVQPDP 111111 ..... 10100 ..... 1101000100 . @X_tb_rc
|
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|
|
### rfebb
|
|
&XL_s s:uint8_t
|
|
@XL_s ......-------------- s:1 .......... - &XL_s
|
|
RFEBB 010011-------------- . 0010010010 - @XL_s
|