c1bb5418e3
The IOAPIC has an 'Extended Destination ID' field in its RTE, which maps to bits 11-4 of the MSI address. Since those address bits fall within a given 4KiB page they were historically non-trivial to use on real hardware. The Intel IOMMU uses the lowest bit to indicate a remappable format MSI, and then the remaining 7 bits are part of the index. Where the remappable format bit isn't set, we can actually use the other seven to allow external (IOAPIC and MSI) interrupts to reach up to 32768 CPUs instead of just the 255 permitted on bare metal. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Message-Id: <78097f9218300e63e751e077a0a5ca029b56ba46.camel@infradead.org> [Fix UBSAN warning. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
140 lines
3.8 KiB
C
140 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _ASM_X86_KVM_PARA_H
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#define _ASM_X86_KVM_PARA_H
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#include "standard-headers/linux/types.h"
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/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
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* should be used to determine that a VM is running under KVM.
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*/
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#define KVM_CPUID_SIGNATURE 0x40000000
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/* This CPUID returns two feature bitmaps in eax, edx. Before enabling
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* a particular paravirtualization, the appropriate feature bit should
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* be checked in eax. The performance hint feature bit should be checked
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* in edx.
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*/
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#define KVM_CPUID_FEATURES 0x40000001
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#define KVM_FEATURE_CLOCKSOURCE 0
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#define KVM_FEATURE_NOP_IO_DELAY 1
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#define KVM_FEATURE_MMU_OP 2
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/* This indicates that the new set of kvmclock msrs
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* are available. The use of 0x11 and 0x12 is deprecated
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*/
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#define KVM_FEATURE_CLOCKSOURCE2 3
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#define KVM_FEATURE_ASYNC_PF 4
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#define KVM_FEATURE_STEAL_TIME 5
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#define KVM_FEATURE_PV_EOI 6
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#define KVM_FEATURE_PV_UNHALT 7
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#define KVM_FEATURE_PV_TLB_FLUSH 9
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#define KVM_FEATURE_ASYNC_PF_VMEXIT 10
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#define KVM_FEATURE_PV_SEND_IPI 11
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#define KVM_FEATURE_POLL_CONTROL 12
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#define KVM_FEATURE_PV_SCHED_YIELD 13
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#define KVM_FEATURE_ASYNC_PF_INT 14
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#define KVM_FEATURE_MSI_EXT_DEST_ID 15
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#define KVM_HINTS_REALTIME 0
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/* The last 8 bits are used to indicate how to interpret the flags field
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* in pvclock structure. If no bits are set, all flags are ignored.
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*/
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#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
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#define MSR_KVM_WALL_CLOCK 0x11
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#define MSR_KVM_SYSTEM_TIME 0x12
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#define KVM_MSR_ENABLED 1
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/* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
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#define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
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#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
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#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
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#define MSR_KVM_STEAL_TIME 0x4b564d03
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#define MSR_KVM_PV_EOI_EN 0x4b564d04
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#define MSR_KVM_POLL_CONTROL 0x4b564d05
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#define MSR_KVM_ASYNC_PF_INT 0x4b564d06
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#define MSR_KVM_ASYNC_PF_ACK 0x4b564d07
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struct kvm_steal_time {
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uint64_t steal;
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uint32_t version;
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uint32_t flags;
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uint8_t preempted;
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uint8_t uint8_t_pad[3];
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uint32_t pad[11];
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};
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#define KVM_VCPU_PREEMPTED (1 << 0)
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#define KVM_VCPU_FLUSH_TLB (1 << 1)
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#define KVM_CLOCK_PAIRING_WALLCLOCK 0
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struct kvm_clock_pairing {
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int64_t sec;
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int64_t nsec;
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uint64_t tsc;
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uint32_t flags;
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uint32_t pad[9];
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};
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#define KVM_STEAL_ALIGNMENT_BITS 5
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#define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
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#define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
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#define KVM_MAX_MMU_OP_BATCH 32
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#define KVM_ASYNC_PF_ENABLED (1 << 0)
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#define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
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#define KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT (1 << 2)
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#define KVM_ASYNC_PF_DELIVERY_AS_INT (1 << 3)
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/* MSR_KVM_ASYNC_PF_INT */
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#define KVM_ASYNC_PF_VEC_MASK GENMASK(7, 0)
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/* Operations for KVM_HC_MMU_OP */
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#define KVM_MMU_OP_WRITE_PTE 1
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#define KVM_MMU_OP_FLUSH_TLB 2
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#define KVM_MMU_OP_RELEASE_PT 3
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/* Payload for KVM_HC_MMU_OP */
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struct kvm_mmu_op_header {
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uint32_t op;
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uint32_t pad;
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};
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struct kvm_mmu_op_write_pte {
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struct kvm_mmu_op_header header;
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uint64_t pte_phys;
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uint64_t pte_val;
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};
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struct kvm_mmu_op_flush_tlb {
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struct kvm_mmu_op_header header;
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};
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struct kvm_mmu_op_release_pt {
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struct kvm_mmu_op_header header;
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uint64_t pt_phys;
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};
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#define KVM_PV_REASON_PAGE_NOT_PRESENT 1
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#define KVM_PV_REASON_PAGE_READY 2
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struct kvm_vcpu_pv_apf_data {
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/* Used for 'page not present' events delivered via #PF */
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uint32_t flags;
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/* Used for 'page ready' events delivered via interrupt notification */
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uint32_t token;
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uint8_t pad[56];
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uint32_t enabled;
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};
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#define KVM_PV_EOI_BIT 0
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#define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
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#define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
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#define KVM_PV_EOI_DISABLED 0x0
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#endif /* _ASM_X86_KVM_PARA_H */
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