3b5ea01e98
Recent POWER CPUs can operate in "LPAR per core" or "LPAR per thread" modes. In per-core mode, some SPRs and IPI doorbells are shared between threads in a core. In per-thread mode, supervisor and user state is not shared between threads. OpenPOWER systems after POWER8 use LPAR per thread mode, and it is required for KVM. Enterprise systems use LPAR per core mode, as they partition the machine by core. Implement a lpar-per-core machine option for powernv machines. This is fixed true for POWER8 machines, and defaults off for P9 and P10. With this change, powernv8 SMT now works sufficiently to run Linux, with a single socket. Multi-threaded KVM guests still have problems, as does multi-socket Linux boot. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> |
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fdt.h | ||
mac_dbdma.h | ||
openpic_kvm.h | ||
openpic.h | ||
pnv_adu.h | ||
pnv_chip.h | ||
pnv_chiptod.h | ||
pnv_core.h | ||
pnv_homer.h | ||
pnv_i2c.h | ||
pnv_lpc.h | ||
pnv_n1_chiplet.h | ||
pnv_nest_pervasive.h | ||
pnv_occ.h | ||
pnv_pnor.h | ||
pnv_psi.h | ||
pnv_sbe.h | ||
pnv_xive.h | ||
pnv_xscom.h | ||
pnv.h | ||
ppc4xx.h | ||
ppc_e500.h | ||
ppc.h | ||
spapr_cpu_core.h | ||
spapr_drc.h | ||
spapr_irq.h | ||
spapr_nested.h | ||
spapr_numa.h | ||
spapr_nvdimm.h | ||
spapr_ovec.h | ||
spapr_tpm_proxy.h | ||
spapr_vio.h | ||
spapr_xive.h | ||
spapr.h | ||
vof.h | ||
xics_spapr.h | ||
xics.h | ||
xive2_regs.h | ||
xive2.h | ||
xive_regs.h | ||
xive.h |