35520bc702
Currently, PCI link devices (PNP0C0F) are always created within the scope of the PCI root bridge. However, RISC-V needs these link devices to be created outside to ensure the probing order in the OS. This matches the example given in the ACPI specification [1] as well. Hence, create these link devices directly under _SB instead of under the PCI root bridge. To keep these link device names unique for multiple PCI bridges, change the device name from GSIx to LXXY format where XX is the PCI bus number and Y is the INTx. GPEX is currently used by riscv, aarch64/virt and x86/microvm machines. So, this change will alter the DSDT for those systems. [1] - ACPI 5.1: 6.2.13.1 Example: Using _PRT to Describe PCI IRQ Routing Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240716144306.2432257-5-sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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articia.c | ||
astro.c | ||
bonito.c | ||
designware.c | ||
dino.c | ||
gpex-acpi.c | ||
gpex.c | ||
grackle.c | ||
gt64120.c | ||
i440fx.c | ||
Kconfig | ||
meson.build | ||
mv643xx.h | ||
mv64361.c | ||
pam.c | ||
pnv_phb3_msi.c | ||
pnv_phb3_pbcq.c | ||
pnv_phb3.c | ||
pnv_phb4_pec.c | ||
pnv_phb4.c | ||
pnv_phb.c | ||
pnv_phb.h | ||
ppc4xx_pci.c | ||
ppc440_pcix.c | ||
ppce500.c | ||
q35.c | ||
raven.c | ||
remote.c | ||
sabre.c | ||
sh_pci.c | ||
trace-events | ||
trace.h | ||
uninorth.c | ||
versatile.c | ||
xen_igd_pt.c | ||
xilinx-pcie.c |