qemu/gdb-xml
TaiseiIto 75ac231c67 gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB
Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.
Line 129 says the size is 4 bytes.

As a result, when GDB is debugging an OS running on QEMU, the GDB cannot
read 'g' packets correctly. This 'g' packet transmits values of each
registers of machine emulated by QEMU to GDB. QEMU, the packet sender,
assign 4 bytes for EFER in 'g' packet based on the line 113.
GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on
the line 129. Therefore, all registers located behind EFER in 'g' packet
has been shifted 4 bytes in GDB.

After this commit, GDB can read 'g' packets correctly.

Signed-off-by: TaiseiIto <taisei1212@outlook.jp>
Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06 09:48:26 +01:00
..
aarch64-core.xml
aarch64-fpu.xml
arm-core.xml
arm-m-profile-mve.xml
arm-m-profile.xml
arm-neon.xml
arm-vfp3.xml
arm-vfp-sysregs.xml
arm-vfp.xml
avr-cpu.xml
cf-core.xml
cf-fp.xml
i386-32bit.xml gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB 2022-11-06 09:48:26 +01:00
i386-64bit.xml
loongarch-base64.xml
loongarch-fpu.xml
m68k-core.xml
m68k-fp.xml
power64-core.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
riscv-32bit-cpu.xml
riscv-32bit-fpu.xml
riscv-32bit-virtual.xml
riscv-64bit-cpu.xml
riscv-64bit-fpu.xml
riscv-64bit-virtual.xml
rx-core.xml
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml
s390-virt.xml
s390-vx.xml
s390x-core64.xml