39bffca203
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
167 lines
5.2 KiB
C
167 lines
5.2 KiB
C
/*
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* QEMU Grackle PCI host (heathrow OldWorld PowerMac)
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*
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* Copyright (c) 2006-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "sysbus.h"
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#include "ppc_mac.h"
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#include "pci.h"
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#include "pci_host.h"
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/* debug Grackle */
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//#define DEBUG_GRACKLE
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#ifdef DEBUG_GRACKLE
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#define GRACKLE_DPRINTF(fmt, ...) \
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do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define GRACKLE_DPRINTF(fmt, ...)
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#endif
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typedef struct GrackleState {
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SysBusDevice busdev;
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PCIHostState host_state;
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MemoryRegion pci_mmio;
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MemoryRegion pci_hole;
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} GrackleState;
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/* Don't know if this matches real hardware, but it agrees with OHW. */
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static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return (irq_num + (pci_dev->devfn >> 3)) & 3;
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}
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static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
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{
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qemu_irq *pic = opaque;
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GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
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qemu_set_irq(pic[irq_num + 0x15], level);
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}
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static void pci_grackle_reset(void *opaque)
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{
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}
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io)
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{
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DeviceState *dev;
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SysBusDevice *s;
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GrackleState *d;
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dev = qdev_create(NULL, "grackle-pcihost");
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qdev_init_nofail(dev);
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s = sysbus_from_qdev(dev);
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d = FROM_SYSBUS(GrackleState, s);
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memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
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memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
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0x80000000ULL, 0x7e000000ULL);
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memory_region_add_subregion(address_space_mem, 0x80000000ULL,
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&d->pci_hole);
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d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
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pci_grackle_set_irq,
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pci_grackle_map_irq,
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pic,
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&d->pci_mmio,
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address_space_io,
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0, 4);
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pci_create_simple(d->host_state.bus, 0, "grackle");
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sysbus_mmio_map(s, 0, base);
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sysbus_mmio_map(s, 1, base + 0x00200000);
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return d->host_state.bus;
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}
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static int pci_grackle_init_device(SysBusDevice *dev)
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{
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GrackleState *s;
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s = FROM_SYSBUS(GrackleState, dev);
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memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops,
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&s->host_state, "pci-conf-idx", 0x1000);
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memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops,
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&s->host_state, "pci-data-idx", 0x1000);
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sysbus_init_mmio(dev, &s->host_state.conf_mem);
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sysbus_init_mmio(dev, &s->host_state.data_mem);
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qemu_register_reset(pci_grackle_reset, &s->host_state);
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return 0;
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}
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static int grackle_pci_host_init(PCIDevice *d)
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{
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d->config[0x09] = 0x01;
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return 0;
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}
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static void grackle_pci_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->init = grackle_pci_host_init;
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k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
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k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
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k->revision = 0x00;
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k->class_id = PCI_CLASS_BRIDGE_HOST;
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dc->no_user = 1;
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}
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static TypeInfo grackle_pci_info = {
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.name = "grackle",
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCIDevice),
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.class_init = grackle_pci_class_init,
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};
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static void pci_grackle_class_init(ObjectClass *klass, void *data)
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{
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->init = pci_grackle_init_device;
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dc->no_user = 1;
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}
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static TypeInfo grackle_pci_host_info = {
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.name = "grackle-pcihost",
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(GrackleState),
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.class_init = pci_grackle_class_init,
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};
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static void grackle_register_devices(void)
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{
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type_register_static(&grackle_pci_info);
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type_register_static(&grackle_pci_host_info);
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}
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device_init(grackle_register_devices)
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