qemu/target/microblaze
Richard Henderson 3986c650a2 target/microblaze: Mark fpu helpers TCG_CALL_NO_WG
Now that FSR is no longer a tcg global temp, we can say that
the fpu helpers do not write to tcg temps.  All temps are
read implicitly by the fpu exception path.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:41:38 -07:00
..
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c target/microblaze: Split out MSR[C] to its own variable 2020-09-01 07:41:38 -07:00
cpu.h target/microblaze: Ensure imm constant is always available 2020-09-01 07:41:38 -07:00
gdbstub.c target/microblaze: Split out MSR[C] to its own variable 2020-09-01 07:41:38 -07:00
helper.c target/microblaze: Remove empty D macros 2020-09-01 07:41:38 -07:00
helper.h target/microblaze: Mark fpu helpers TCG_CALL_NO_WG 2020-09-01 07:41:38 -07:00
insns.decode target/microblaze: Convert dec_fpu to decodetree 2020-09-01 07:41:38 -07:00
meson.build target/microblaze: Add decodetree infrastructure 2020-09-01 07:41:38 -07:00
microblaze-decode.h Supply missing header guards 2019-06-12 13:20:21 +02:00
mmu.c target/microblaze: Fix width of PC and BTARGET 2020-09-01 07:41:38 -07:00
mmu.h Supply missing header guards 2019-06-12 13:20:21 +02:00
op_helper.c target/microblaze: Fix cpu unwind for fpu exceptions 2020-09-01 07:41:38 -07:00
translate.c target/microblaze: Convert dec_fpu to decodetree 2020-09-01 07:41:38 -07:00