qemu/tests/tcg/riscv64/test-noc.S
Richard Henderson ec2918b467 target/riscv: Set pc_succ_insn for !rvc illegal insn
Failure to set pc_succ_insn may result in a TB covering zero bytes,
which triggers an assert within the code generator.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1224
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221203175744.151365-1-richard.henderson@linaro.org>
[ Changes by AF:
 - Add missing run-plugin-test-noc-% line
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-06 10:42:55 +10:00

33 lines
382 B
ArmAsm

#include <asm/unistd.h>
.text
.globl _start
_start:
.option norvc
li a0, 4 /* SIGILL */
la a1, sa
li a2, 0
li a3, 8
li a7, __NR_rt_sigaction
scall
.option rvc
li a0, 1
j exit
.option norvc
pass:
li a0, 0
exit:
li a7, __NR_exit
scall
.data
/* struct kernel_sigaction sa = { .sa_handler = pass }; */
.type sa, @object
.size sa, 32
sa:
.dword pass
.zero 24