mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
37ad52ba7a
qemu/target-ppc/translate
History
Vasant Hegde 37ad52ba7a target-ppc: add vmul10[u,eu,cu,ecu]q instructions 
vmul10uq  : Vector Multiply-by-10 Unsigned Quadword VX-form
vmul10euq : Vector Multiply-by-10 Extended Unsigned Quadword VX-form
vmul10cuq : Vector Multiply-by-10 & write Carry Unsigned Quadword VX-form
vmul10ecuq: Vector Multiply-by-10 Extended & write Carry Unsigned Quadword VX-form

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
[ Add GEN_VXFORM_DUAL_EXT with invalid bit mask ]
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-28 09:38:25 +11:00
..
dfp-impl.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
dfp-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
fp-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
fp-ops.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
vmx-impl.inc.c target-ppc: add vmul10[u,eu,cu,ecu]q instructions 2016-10-28 09:38:25 +11:00
vmx-ops.inc.c target-ppc: add vmul10[u,eu,cu,ecu]q instructions 2016-10-28 09:38:25 +11:00
vsx-impl.inc.c target-ppc: implement xxbr[qdwh] instruction 2016-10-28 09:36:58 +11:00
vsx-ops.inc.c target-ppc: implement xxbr[qdwh] instruction 2016-10-28 09:36:58 +11:00