3c471b0701
since binutils is pretty old, it fails our CI repeatedly during the compilation of tricore-binutils. We created a precompiled version using the debian docker image and download it instead of building it ourself. We also updated the package to include a newer version of binutils, gcc, and newlib. The default TriCore ISA version used by tricore-as changed from the old version, so we have to specify it now. If we don't 'test_fadd' fails with 'unknown opcode'. The new assembler also picks a new encoding in ld.h which fails the 'test_ld_h' test. We fix that by using the newest TriCore CPU for QEMU. The old assembler accepted an extra ')' in 'test_imask'. The new one does not, so lets remove it. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230209145812.46730-1-kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230228190653.1602033-12-alex.bennee@linaro.org>
198 lines
8.0 KiB
C
198 lines
8.0 KiB
C
/* Helpers */
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#define LI(reg, val) \
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mov.u reg, lo:val; \
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movh DREG_TEMP_LI, up:val; \
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or reg, reg, DREG_TEMP_LI; \
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#define LIA(reg, val) \
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LI(DREG_TEMP, val) \
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mov.a reg, DREG_TEMP;
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/* Address definitions */
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#define TESTDEV_ADDR 0xf0000000
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/* Register definitions */
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#define DREG_RS1 %d0
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#define DREG_RS2 %d1
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#define DREG_RS3 %d2
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#define DREG_CALC_RESULT %d3
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#define DREG_CALC_PSW %d4
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#define DREG_CORRECT_PSW %d5
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#define DREG_TEMP_LI %d10
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#define DREG_TEMP %d11
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#define DREG_TEST_NUM %d14
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#define DREG_CORRECT_RESULT %d15
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#define DREG_CORRECT_RESULT_2 %d13
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#define AREG_ADDR %a0
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#define AREG_CORRECT_RESULT %a3
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#define MEM_BASE_ADDR 0xd0000000
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#define DREG_DEV_ADDR %a15
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#define EREG_RS1 %e6
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#define EREG_RS1_LO %d6
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#define EREG_RS1_HI %d7
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#define EREG_RS2 %e8
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#define EREG_RS2_LO %d8
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#define EREG_RS2_HI %d9
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#define EREG_CALC_RESULT %e8
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#define EREG_CALC_RESULT_HI %d9
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#define EREG_CALC_RESULT_LO %d8
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#define EREG_CORRECT_RESULT_LO %d0
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#define EREG_CORRECT_RESULT_HI %d1
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/* Test case wrappers */
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#define TEST_CASE(num, testreg, correct, code...) \
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test_ ## num: \
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code; \
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LI(DREG_CORRECT_RESULT, correct) \
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mov DREG_TEST_NUM, num; \
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jne testreg, DREG_CORRECT_RESULT, fail \
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#define TEST_CASE_E(num, correct_lo, correct_hi, code...) \
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test_ ## num: \
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code; \
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mov DREG_TEST_NUM, num; \
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LI(EREG_CORRECT_RESULT_LO, correct_lo) \
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jne EREG_CALC_RESULT_LO, EREG_CORRECT_RESULT_LO, fail; \
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LI(EREG_CORRECT_RESULT_HI, correct_hi) \
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jne EREG_CALC_RESULT_HI, EREG_CORRECT_RESULT_HI, fail;
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#define TEST_CASE_PSW(num, testreg, correct, correct_psw, code...) \
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test_ ## num: \
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code; \
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LI(DREG_CORRECT_RESULT, correct) \
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mov DREG_TEST_NUM, num; \
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jne testreg, DREG_CORRECT_RESULT, fail; \
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mfcr DREG_CALC_PSW, $psw; \
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LI(DREG_CORRECT_PSW, correct_psw) \
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mov DREG_TEST_NUM, num; \
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jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
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#define TEST_LD(insn, num, result, addr_result, ld_pattern) \
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test_ ## num: \
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LIA(AREG_ADDR, test_data) \
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insn DREG_CALC_RESULT, ld_pattern; \
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LI(DREG_CORRECT_RESULT, result) \
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mov DREG_TEST_NUM, num; \
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jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
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mov.d DREG_CALC_RESULT, AREG_ADDR; \
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LI(DREG_CORRECT_RESULT, addr_result) \
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jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
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#define TEST_LD_SRO(insn, num, result, addr_result, ld_pattern) \
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test_ ## num: \
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LIA(AREG_ADDR, test_data) \
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insn %d15, ld_pattern; \
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LI(DREG_CORRECT_RESULT_2, result) \
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mov DREG_TEST_NUM, num; \
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jne %d15, DREG_CORRECT_RESULT_2, fail; \
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mov.d DREG_CALC_RESULT, AREG_ADDR; \
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LI(DREG_CORRECT_RESULT, addr_result) \
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jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
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/* Actual test case type
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* e.g inst %dX, %dY -> TEST_D_D
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* inst %dX, %dY, %dZ -> TEST_D_DD
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* inst %eX, %dY, %dZ -> TEST_E_DD
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*/
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#define TEST_D_D(insn, num, result, rs1) \
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TEST_CASE(num, DREG_CALC_RESULT, result, \
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LI(DREG_RS1, rs1); \
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insn DREG_CALC_RESULT, DREG_RS1; \
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)
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#define TEST_D_D_PSW(insn, num, result, psw, rs1) \
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TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
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LI(DREG_RS1, rs1); \
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rstv; \
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insn DREG_CORRECT_RESULT, DREG_RS1; \
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)
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#define TEST_D_DDD(insn, num, result, rs1, rs2, rs3) \
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TEST_CASE(num, DREG_CALC_RESULT, result, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs2); \
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LI(DREG_RS3, rs3); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
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)
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#define TEST_D_DD_PSW(insn, num, result, psw, rs1, rs2) \
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TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs2); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
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)
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#define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \
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TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs2); \
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LI(DREG_RS3, rs3); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
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)
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#define TEST_D_DDI(insn, num, result, rs1, rs2, imm) \
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TEST_CASE(num, DREG_CALC_RESULT, result, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs2); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
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)
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#define TEST_D_DDI_PSW(insn, num, result, psw, rs1, rs2, imm) \
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TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs2); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
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)
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#define TEST_D_DIDI(insn, num, result, rs1, imm1, rs2, imm2) \
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TEST_CASE(num, DREG_CALC_RESULT, result, \
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LI(DREG_RS1, rs1); \
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LI(DREG_RS2, rs1); \
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rstv; \
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insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
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)
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#define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
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TEST_CASE_E(num, res_lo, res_hi, \
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LI(EREG_RS1_LO, rs1_lo); \
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LI(EREG_RS1_HI, rs1_hi); \
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LI(DREG_RS2, rs2); \
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insn EREG_CALC_RESULT, EREG_RS1, DREG_RS2; \
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)
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#define TEST_E_IDI(insn, num, res_hi, res_lo, imm1, rs1, imm2) \
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TEST_CASE_E(num, res_lo, res_hi, \
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LI(DREG_RS1, rs1); \
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rstv; \
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insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2; \
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)
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/* Pass/Fail handling part */
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#define TEST_PASSFAIL \
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j pass; \
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fail: \
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LI(DREG_TEMP, TESTDEV_ADDR) \
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mov.a DREG_DEV_ADDR, DREG_TEMP; \
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st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
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debug; \
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j fail; \
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pass: \
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LI(DREG_TEMP, TESTDEV_ADDR) \
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mov.a DREG_DEV_ADDR, DREG_TEMP; \
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mov DREG_TEST_NUM, 0; \
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st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
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debug; \
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j pass;
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